ARM: Tegra: TT-power: new model data of max17048
Hyongbin Kim [Thu, 11 Jul 2013 02:44:49 +0000 (11:44 +0900)]
Bug 1304204

Change-Id: I1ee1539714011663b460f3627dd7b45edb0877ce
Signed-off-by: Hyongbin Kim <hyongbink@nvidia.com>
Reviewed-on: http://git-master/r/247543
(cherry picked from commit 6a24b3182ee126458e490291b42786c25b5e12c3)
Reviewed-on: http://git-master/r/289147
Reviewed-by: Gabby Lee <galee@nvidia.com>
Tested-by: Gabby Lee <galee@nvidia.com>

arch/arm/boot/dts/tegra114-tegratab-common.dtsi
arch/arm/mach-tegra/board-tegratab-power.c

index e07b173..ee56999 100644 (file)
                        vreset-disable = <1>;           /* not use */
                        hib-threshold = <48>;           /* 9.984%/hr */
                        hib-active-threshold = <128>;   /* 160mV */
-                       bits = <18>;
-                       rcomp = <57>;
-                       rcomp-seg = <0x0200>;
-                       soccheck-a = <119>;
-                       soccheck-b = <121>;
-                       ocvtest = <55952>;
-                       data-tbl = <0x98 0x80 0xB3 0x50 0xB7 0x90 0xB9 0x00
-                               0xBA 0x70 0xBC 0x10 0xBC 0x50 0xBC 0xA0
-                               0xBD 0x20 0xBE 0x30 0xBF 0x40 0xC2 0xF0
-                               0xC4 0x20 0xC7 0xE0 0xCB 0xF0 0xD0 0x90
-                               0x00 0x40 0x06 0x70 0x0E 0x50 0x12 0x00
-                               0x18 0xD0 0x33 0x10 0x31 0x40 0x35 0xD0
-                               0x18 0xD0 0x19 0x00 0x0B 0xF0 0x0C 0x10
-                               0x0D 0x10 0x07 0x90 0x08 0x00 0x08 0x00>;
+                       bits = <19>;
+                       rcomp = <105>;
+                       rcomp-seg = <0x0080>;
+                       soccheck-a = <233>;
+                       soccheck-b = <235>;
+                       ocvtest = <55824>;
+                       data-tbl = <0xAA 0x30 0xB7 0x80 0xB8 0xD0 0xBA 0xC0
+                               0xBB 0xC0 0xBC 0x30 0xBC 0xB0 0xBD 0x60
+                               0xBE 0x10 0xBF 0x40 0xC0 0x30 0xC3 0x80
+                               0xC5 0x00 0xC7 0x60 0xCB 0x50 0xD0 0x10
+                               0x03 0x00 0x30 0xC0 0x1C 0x40 0x2C 0x00
+                               0x70 0xC0 0x51 0x40 0x43 0xE0 0x43 0xC0
+                               0x29 0xC0 0x2F 0xC0 0x17 0xE0 0x12 0xE0
+                               0x1C 0x20 0x13 0x80 0x0E 0x00 0x0E 0x00>;
                };
        };
 
index d0df177..773e7ee 100644 (file)
@@ -92,27 +92,27 @@ struct bq2419x_charger_platform_data tegratab_bq2419x_charger_pdata = {
 
 #ifndef CONFIG_OF
 struct max17048_battery_model tegratab_max17048_mdata = {
-       .rcomp          = 57,
-       .soccheck_A     = 119,
-       .soccheck_B     = 121,
-       .bits           = 18,
+       .rcomp          = 105,
+       .soccheck_A     = 233,
+       .soccheck_B     = 235,
+       .bits           = 19,
        .alert_threshold = 0x01,        /* 1% SOC */
        .one_percent_alerts = 0x40,
        .alert_on_reset = 0x00,         /* not use */
-       .rcomp_seg      = 0x0200,
+       .rcomp_seg      = 0x0080,
        .hibernate      = 0x3080,
        .vreset         = 0x3c96,
        .valert         = 0xA2FF,       /*VALRT.MIN 3.24V, VALRT.MAX 5.1V*/
-       .ocvtest        = 55952,
+       .ocvtest        = 55824,
        .data_tbl = {
-               0x98, 0x80, 0xB3, 0x50, 0xB7, 0x90, 0xB9, 0x00,
-               0xBA, 0x70, 0xBC, 0x10, 0xBC, 0x50, 0xBC, 0xA0,
-               0xBD, 0x20, 0xBE, 0x30, 0xBF, 0x40, 0xC2, 0xF0,
-               0xC4, 0x20, 0xC7, 0xE0, 0xCB, 0xF0, 0xD0, 0x90,
-               0x00, 0x40, 0x06, 0x70, 0x0E, 0x50, 0x12, 0x00,
-               0x18, 0xD0, 0x33, 0x10, 0x31, 0x40, 0x35, 0xD0,
-               0x18, 0xD0, 0x19, 0x00, 0x0B, 0xF0, 0x0C, 0x10,
-               0x0D, 0x10, 0x07, 0x90, 0x08, 0x00, 0x08, 0x00,
+               0xAA, 0x30, 0xB7, 0x80, 0xB8, 0xD0, 0xBA, 0xC0,
+               0xBB, 0xC0, 0xBC, 0x30, 0xBC, 0xB0, 0xBD, 0x60,
+               0xBE, 0x10, 0xBF, 0x40, 0xC0, 0x30, 0xC3, 0x80,
+               0xC5, 0x00, 0xC7, 0x60, 0xCB, 0x50, 0xD0, 0x10,
+               0x03, 0x00, 0x30, 0xC0, 0x1C, 0x40, 0x2C, 0x00,
+               0x70, 0xC0, 0x51, 0x40, 0x43, 0xE0, 0x43, 0xC0,
+               0x29, 0xC0, 0x2F, 0xC0, 0x17, 0xE0, 0x12, 0xE0,
+               0x1C, 0x20, 0x13, 0x80, 0x0E, 0x00, 0x0E, 0x00,
        },
 };