tegra: usb: phy: usb trigger change for wakeup event
Suresh Mangipudi [Fri, 30 Sep 2011 10:47:40 +0000 (15:47 +0530)]
Change the trigger for the wake events. The WAKE_ON_CONNECT bit should not
be cleared until the PCD_STS bit is set.

Bug 881388

Reviewed-on: http://git-master/r/62335
(cherry picked from commit 0b2d13a0e7dfe5218082b799599fa815ad9c9334)

Change-Id: I0d02f939ea5ba205765771242787f328c92092d5
Reviewed-on: http://git-master/r/63010
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

Rebase-Id: R3673afb4fc4357f4b72cd9af8c561902f223fbc5

arch/arm/mach-tegra/usb_phy.c
drivers/usb/host/ehci-tegra.c

index db59f8d..76116c4 100644 (file)
 #define WAKE_VAL_FSJ                   0x2
 #define WAKE_VAL_FSK                   0x1
 #define WAKE_VAL_SE0                   0x0
+#define WAKE_VAL_ANY                   0xf
 
 #define PMC_SLEEP_CFG                  0x1fc
 #define UTMIP_TCTRL_USE_PMC(inst)      (1 << ((8*(inst))+3))
@@ -1288,10 +1289,7 @@ static void utmip_setup_pmc_wake_detect(struct tegra_usb_phy *phy)
        /* Turn over pad configuration to PMC  for line wake events*/
        val = readl(pmc_base + PMC_SLEEP_CFG);
        val &= ~UTMIP_WAKE_VAL(inst, ~0);
-       if (port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW)
-               val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_FSJ);
-       else
-               val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_FSK);
+       val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_ANY);
        val |= UTMIP_RCTRL_USE_PMC(inst) | UTMIP_TCTRL_USE_PMC(inst);
        val |= UTMIP_MASTER_ENABLE(inst) | UTMIP_FSLS_USE_PMC(inst);
        writel(val, pmc_base + PMC_SLEEP_CFG);
@@ -1583,8 +1581,11 @@ static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
                do {
                        val = readl(base + USB_PORTSC1);
                        udelay(1);
-                       if (wait_time_us == 0)
+                       if (wait_time_us == 0) {
+                               utmip_phy_disable_pmc_bus_ctrl(phy);
+                               tegra_usb_phy_postresume(phy, false);
                                return;
+                       }
                        wait_time_us--;
                } while (!(val & USB_PORTSC1_RESUME));
                /* disable PMC master control */
index 799bd1b..d0a45f0 100644 (file)
@@ -186,15 +186,14 @@ static irqreturn_t tegra_ehci_irq (struct usb_hcd *hcd)
                                TEGRA_USB_PHY_CLK_VALID_INT_STS;
                        writel(val , (hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET));
 
-                       val = readl(hcd->regs + TEGRA_USB_PORTSC1_OFFSET);
-                       val &= ~TEGRA_USB_PORTSC1_WKCN;
-                       writel(val , (hcd->regs + TEGRA_USB_PORTSC1_OFFSET));
-
                        val = readl(&hw->status);
                        if (!(val  & STS_PCD)) {
                                spin_unlock(&ehci->lock);
                                return 0;
                        }
+                       val = readl(hcd->regs + TEGRA_USB_PORTSC1_OFFSET);
+                       val &= ~(TEGRA_USB_PORTSC1_WKCN | PORT_RWC_BITS);
+                       writel(val , (hcd->regs + TEGRA_USB_PORTSC1_OFFSET));
                }
                spin_unlock(&ehci->lock);
        }