arm: tegra: la: Fix the register offset for G2_1
Krishna Reddy [Wed, 18 Jan 2012 23:47:45 +0000 (15:47 -0800)]
Reviewed-on: http://git-master/r/76065

Change-Id: I8eb5148399cc8a08c2f37f20927b655f3e909241
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/76817
Reviewed-by: Automatic_Commit_Validation_User

arch/arm/mach-tegra/latency_allowance.c

index ab2459b..896e1e9 100644 (file)
@@ -44,7 +44,7 @@
 #define MC_LA_EPP_0            0x300
 #define MC_LA_EPP_1            0x304
 #define MC_LA_G2_0             0x308
-#define MC_LA_G2_1             0x304
+#define MC_LA_G2_1             0x30c
 #define MC_LA_HC_0             0x310
 #define MC_LA_HC_1             0x314
 #define MC_LA_HDA_0            0x318