arm: tegra: cardhu: increasing UART3 drive strength
Pradeep Goudagunta [Thu, 14 Jul 2011 11:12:08 +0000 (16:12 +0530)]
setting UART3 signal drive strength to maximum.

Bug 819411

Original-Change-Id: Ie7103fe835868d8041d29bd2b85c7b43fcacc5eb
Reviewed-on: http://git-master/r/41028
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R3ca41455889e1c5c8a5c5fe7bfc3ace0dd60da2a

arch/arm/mach-tegra/board-cardhu-pinmux.c

index fff8964..a232e82 100644 (file)
@@ -82,6 +82,9 @@ static __initdata struct tegra_drive_pingroup_config cardhu_drive_pinmux[] = {
 
        /* PWR_I2C */
        SET_DRIVE(AO1,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+
+       /* UART3 */
+       SET_DRIVE(UART3,        DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
 };
 
 #define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io)      \