ARM: tegra: clock: Fixed Tegra3 audio pll and board setting
Alex Frid [Wed, 19 Jan 2011 05:40:48 +0000 (21:40 -0800)]
Original-Change-Id: I3fd6622c4f4ff43b8ab03d552dd488a51d2cfdf4
Reviewed-on: http://git-master/r/16209
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I1279516ce261882d9e390cb6adbdb9bcffac0f94

Rebase-Id: R33c125767efe8bfe598ad416f6568da20f5cad94

arch/arm/mach-tegra/board-cardhu.c

index 21f2bbb..a00ccf1 100644 (file)
@@ -155,7 +155,7 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
        { "pll_p_out4", "pll_p",        24000000,       true },
        { "pwm",        "clk_32k",      32768,          false},
        { "blink",      "clk_32k",      32768,          false},
-       { "pll_a",      NULL,           11289600,       true},
+       { "pll_a",      NULL,           56448000,       true},
        { "pll_a_out0", NULL,           11289600,       true},
        { "i2s1",       "pll_a_out0",   11289600,       true},
        { "i2s2",       "pll_a_out0",   11289600,       true},