media: video: tegra: ov9772: add 960x720 support
Phil Breczinski [Thu, 18 Oct 2012 01:36:22 +0000 (18:36 -0700)]
Add support for 960x720 resolution to ov9772 driver. This
provides a 4:3 resolution in addition to the existing
16:9 resolution (720p).  Also includes support for
sensor-specific setmode frame delays (needed for driver
functionality).

Bug 1156852

Signed-off-by: Phil Breczinski <pbreczinski@nvidia.com>
Change-Id: I5dfb5f9aa131caae66f19ff975b879b4a54c2788
Reviewed-on: http://git-master/r/161830
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>

drivers/media/video/tegra/ov9772.c
include/media/nvc_image.h

index 61d1d6e..895f9a9 100644 (file)
 #define OV9772_LENS_VIEW_ANGLE_V       60000 /* / _INT2FLOAT_DIVISOR */
 #define OV9772_I2C_TABLE_MAX_ENTRIES   400
 
+/* comment out definition to disable mode */
+#define OV9772_ENABLE_1284x724
+#define OV9772_ENABLE_960x720
+
 static u16 ov9772_ids[] = {
        0x9772,
 };
@@ -210,7 +214,7 @@ static struct nvc_imager_cap ov9772_dflt_cap = {
        /* refer to NvOdmImagerSensorInterface enum in ODM nvodm_imager.h */
        .sensor_nvc_interface   = NVC_IMAGER_SENSOR_INTERFACE_SERIAL_B,
        /* refer to NvOdmImagerPixelType enum in ODM nvodm_imager.h */
-       .pixel_types[0]         = 0x103,
+       .pixel_types[0]         = 0x101,
        /* refer to NvOdmImagerOrientation enum in ODM nvodm_imager.h */
        .orientation            = 0,
        /* refer to NvOdmImagerDirection enum in ODM nvodm_imager.h */
@@ -301,12 +305,10 @@ static struct ov9772_reg *test_patterns[] = {
        tp_cbars_seq,
        tp_checker_seq,
 };
-
+#ifdef OV9772_ENABLE_1284x724
 static struct ov9772_reg ov9772_1284x724_i2c[] = {
        {0x0103, 0x01},
        {OV9772_TABLE_WAIT_MS, 100},
-       {0x0200, 0x00},
-       {0x0201, 0x00},
        {0x0300, 0x00},
        {0x0301, 0x0a},
        {0x0302, 0x00},
@@ -319,6 +321,14 @@ static struct ov9772_reg ov9772_1284x724_i2c[] = {
        {0x0341, 0xf8},
        {0x0342, 0x06},
        {0x0343, 0x2a},
+       {0x0344, 0x00},
+       {0x0345, 0x00},
+       {0x0346, 0x00},
+       {0x0347, 0x00},
+       {0x0348, 0x05},
+       {0x0349, 0x04},
+       {0x034a, 0x02},
+       {0x034b, 0xd4},
        {0x034c, 0x05},
        {0x034d, 0x04},
        {0x034e, 0x02},
@@ -386,7 +396,118 @@ static struct ov9772_reg ov9772_1284x724_i2c[] = {
        {OV9772_TABLE_WAIT_MS, 100},
        {OV9772_TABLE_END, 0x0000}
 };
-
+#endif
+#ifdef OV9772_ENABLE_960x720
+static struct ov9772_reg ov9772_960x720_i2c[] = {
+       {0x0103, 0x01},
+       {OV9772_TABLE_WAIT_MS, 100},
+       {0x3745, 0x00},
+       {0x3746, 0x18},
+       {0x3620, 0x36},
+       {0x3622, 0x24},
+       {0x3022, 0x20},
+       {0x3631, 0xc2},
+       {0x371b, 0x60},
+       {0x3634, 0x04},
+       {0x3613, 0x83},
+       {0x4837, 0x36},
+       {0x4805, 0x10},
+       {0x3724, 0x1c},
+       {0x0300, 0x00},
+       {0x0301, 0x0a},
+       {0x0302, 0x00},
+       {0x0303, 0x02},
+       {0x0304, 0x00},
+       {0x0305, 0x02},
+       {0x0306, 0x00},
+       {0x0307, 0x3c},
+       {0x303c, 0x23},
+       {0x4001, 0x02},
+       {0x0200, 0x00},
+       {0x0201, 0x00},
+       {0x372c, 0x00},
+       {0x372d, 0x00},
+       {0x5005, 0x08},
+       {0x3a0c, 0x20},
+       {0x5310, 0x01},
+       {0x5311, 0xff},
+       {0x53b9, 0x0f},
+       {0x53ba, 0x04},
+       {0x53bb, 0x4a},
+       {0x53bc, 0xd3},
+       {0x53bd, 0x41},
+       {0x53be, 0x00},
+       {0x53c4, 0x03},
+       {0x3602, 0xc0},
+       {0x3611, 0x10},
+       {0x3c00, 0x00},
+       {0x370e, 0x00},
+       {0x0344, 0x00},
+       {0x0345, 0xA1},
+       {0x0346, 0x00},
+       {0x0347, 0x00},
+       {0x0348, 0x04},
+       {0x0349, 0x61},
+       {0x034a, 0x02},
+       {0x034b, 0xd0},
+       {0x034c, 0x03},
+       {0x034d, 0xc0},
+       {0x034e, 0x02},
+       {0x034f, 0xd0},
+       {0x0340, 0x02},
+       {0x0341, 0xf8},
+       {0x0342, 0x06},
+       {0x0343, 0x2a},
+       {0x3a14, 0x15},
+       {0x3a15, 0x60},
+       {0x3a08, 0x00},
+       {0x3a09, 0xe4},
+       {0x3a0e, 0x03},
+       {0x3a02, 0x17},
+       {0x3a03, 0xc0},
+       {0x3a0a, 0x00},
+       {0x3a0b, 0xbe},
+       {0x3a0d, 0x04},
+       {0x0303, 0x02},
+       {0x0601, 0x00},
+       {0x3b01, 0x32},
+       {0x3b02, 0xa4},
+       {0x3f00, 0x2a},
+       {0x3f01, 0x8c},
+       {0x3f0f, 0xf5},
+       {0x4801, 0x0f},
+       {0x3012, 0x70},
+       {0x3014, 0x0d},
+       {0x3025, 0x03},
+       {0x4815, 0x00},
+       {0x0307, 0x3c},
+       {0x0301, 0x0a},
+       {0x0101, 0x01},
+       {0x3708, 0x24},
+       {0x3709, 0x10},
+       {0x5000, 0x06},
+       {0x5001, 0x31},
+       {0x5100, 0x00},
+       {0x3503, 0x17},
+       {0x5001, 0x31},
+       {0x4002, 0x45},
+       {0x0345, 0x01},
+       {0x4000, 0x07},
+       {0x3610, 0xc0},
+       {0x3613, 0x82},
+       {0x3631, 0xe2},
+       {0x3634, 0x03},
+       {0x373c, 0x08},
+       {0x3a18, 0x00},
+       {0x3a19, 0x7f},
+       {0x373b, 0x01},
+       {0x373c, 0x08},
+       {0x0345, 0xa1},
+       {0x0100, 0x01},
+       {OV9772_TABLE_WAIT_MS, 100},
+       {OV9772_TABLE_END, 0x0000}
+};
+#endif
 /* Each resolution requires the below data table setup and the corresponding
  * I2C data table.
  * If more NVC data is needed for the NVC driver, be sure and modify the
@@ -400,6 +521,7 @@ static struct ov9772_reg ov9772_1284x724_i2c[] = {
  * 2. Add ov9772_mode_data table
  * 3. Add entry to the ov9772_mode_table
  */
+#ifdef OV9772_ENABLE_1284x724
 static struct ov9772_mode_data ov9772_1284x724 = {
        .sensor_mode = {
                .res_x                  = 1284,
@@ -439,12 +561,64 @@ static struct ov9772_mode_data ov9772_1284x724 = {
                .support_fast_mode      = 0,
                .pll_mult               = 60,
                .pll_div                = 4,
+               .mode_sw_wait_frames    = 1500, /* / _INT2FLOAT_DIVISOR */
        },
        .p_mode_i2c                     = ov9772_1284x724_i2c,
 };
-
+#endif
+#ifdef OV9772_ENABLE_960x720
+static struct ov9772_mode_data ov9772_960x720 = {
+       .sensor_mode = {
+               .res_x                  = 960,
+               .res_y                  = 720,
+               .active_start_x         = 0,
+               .active_stary_y         = 0,
+               .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
+               .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
+               .pll_multiplier         = 18000, /* / _INT2FLOAT_DIVISOR */
+               .crop_mode              = NVC_IMAGER_CROPMODE_PARTIAL,
+       },
+       .sensor_dnvc = {
+               .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
+               .region_start_x         = 0,
+               .region_start_y         = 0,
+               .x_scale                = 1,
+               .y_scale                = 1,
+               .bracket_caps           = 1,
+               .flush_count            = 2,
+               .init_intra_frame_skip  = 0,
+               .ss_intra_frame_skip    = 2,
+               .ss_frame_number        = 3,
+               .coarse_time            = 755,
+               .max_coarse_diff        = 5,
+               .min_exposure_course    = 3,
+               .max_exposure_course    = 0xFFF7,
+               .diff_integration_time  = 230, /* / _INT2FLOAT_DIVISOR */
+               .line_length            = 1578,
+               .frame_length           = 760,
+               .min_frame_length       = 760,
+               .max_frame_length       = 0xFFFC,
+               .min_gain               = 1000, /* / _INT2FLOAT_DIVISOR */
+               .max_gain               = 31000, /* / _INT2FLOAT_DIVISOR */
+               .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
+               .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
+               .support_bin_control    = 0,
+               .support_fast_mode      = 0,
+               .pll_mult               = 60,
+               .pll_div                = 4,
+               .mode_sw_wait_frames    = 1500, /* / _INT2FLOAT_DIVISOR */
+       },
+       .p_mode_i2c                     = ov9772_960x720_i2c,
+};
+#endif
 static struct ov9772_mode_data *ov9772_mode_table[] = {
-       [0] = &ov9772_1284x724,
+       [0] =
+#ifdef OV9772_ENABLE_1284x724
+       &ov9772_1284x724,
+#endif
+#ifdef OV9772_ENABLE_960x720
+       &ov9772_960x720,
+#endif
 };
 
 
index e288d0f..41eb771 100644 (file)
@@ -121,10 +121,10 @@ struct nvc_imager_dynamic_nvc {
        __u8 align3;
        __u32 pll_mult;
        __u32 pll_div;
+       __u32 mode_sw_wait_frames;
        __u32 place_holder1;
        __u32 place_holder2;
        __u32 place_holder3;
-       __u32 place_holder4;
 } __packed;
 
 struct nvc_imager_bayer {