arm: tegra: cardhu: Setting maximum drive strength to i2c pins
Laxman Dewangan [Wed, 2 Feb 2011 10:12:55 +0000 (15:12 +0530)]
As per ASIC recommendation, setting drive strength to maximum for
i2c1, i2c2, ddc i2c and pwr i2c (i2c5).

Original-Change-Id: I0ac99fba1d21fc7bbf423c098563edfea9be8ee7
Reviewed-on: http://git-master/r/18009
Tested-by: Mohit Singh <mpsingh@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: Iafa3b8bdae206beaffbd54eba89456067a3e81da

Rebase-Id: R34fa8aec9888d17f69024345d70889ed290516cb

arch/arm/mach-tegra/board-cardhu-pinmux.c

index dfcea6f..425fdbe 100644 (file)
 static __initdata struct tegra_drive_pingroup_config cardhu_drive_pinmux[] = {
        /* DEFAULT_DRIVE(<pin_group>), */
        /* SET_DRIVE(ATA, DISABLE, DISABLE, DIV_1, 31, 31, FAST, FAST) */
-    SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+       SET_DRIVE(DAP2,         DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+
+       /* All I2C pins are driven to maximum drive strength */
+       /* GEN1 I2C */
+       SET_DRIVE(DBG,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+
+       /* GEN2 I2C */
+       SET_DRIVE(AT1,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+       SET_DRIVE(AT5,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+
+       /* DDC I2C */
+       SET_DRIVE(DDC,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
+
+       /* PWR_I2C */
+       SET_DRIVE(AO1,          DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
 };
 
 #define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io)      \
@@ -135,12 +149,12 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux[] = {
        DEFAULT_PINMUX(SDMMC4_RST_N,    RSVD1,           PULL_DOWN,    NORMAL,     INPUT),
 
        /* I2C1 pinmux */
-       DEFAULT_PINMUX(GEN1_I2C_SCL,    I2C1,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN1_I2C_SDA,    I2C1,            NORMAL,    NORMAL,     INPUT),
+       I2C_PINMUX(GEN1_I2C_SCL,        I2C1,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
+       I2C_PINMUX(GEN1_I2C_SDA,        I2C1,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
 
        /* I2C2 pinmux */
-       DEFAULT_PINMUX(GEN2_I2C_SCL,    I2C2,            NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(GEN2_I2C_SDA,    I2C2,            NORMAL,    NORMAL,     INPUT),
+       I2C_PINMUX(GEN2_I2C_SCL,        I2C2,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
+       I2C_PINMUX(GEN2_I2C_SDA,        I2C2,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
 
        /* I2C3 pinmux */
        I2C_PINMUX(CAM_I2C_SCL,         I2C3,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
@@ -151,8 +165,8 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux[] = {
        I2C_PINMUX(DDC_SDA,             I2C4,           PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
 
        /* Power I2C pinmux */
-       DEFAULT_PINMUX(PWR_I2C_SCL,     I2CPWR,          NORMAL,    NORMAL,     INPUT),
-       DEFAULT_PINMUX(PWR_I2C_SDA,     I2CPWR,          NORMAL,    NORMAL,     INPUT),
+       I2C_PINMUX(PWR_I2C_SCL,         I2CPWR,         PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
+       I2C_PINMUX(PWR_I2C_SDA,         I2CPWR,         PULL_UP,        NORMAL, INPUT,  DISABLE,        DISABLE),
 
        DEFAULT_PINMUX(ULPI_DATA0,      UARTA,           NORMAL,    NORMAL,     OUTPUT),
        DEFAULT_PINMUX(ULPI_DATA1,      UARTA,           NORMAL,    NORMAL,     INPUT),