Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
Linus Torvalds [Mon, 8 Jun 2009 16:22:53 +0000 (09:22 -0700)]
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Outline udelay and fix a few issues.
  MIPS: ioctl.h: Fix headers_check warnings
  MIPS: Cobalt: PCI bus is always required to obtain the board ID
  MIPS: Kconfig: Remove "Support for" from Cavium system type
  MIPS: Sibyte: Honor CONFIG_CMDLINE
  SSB: BCM47xx: Export ssb_watchdog_timer_set

19 files changed:
arch/arm/include/asm/cache.h
arch/arm/include/asm/page.h
arch/arm/mach-mx2/clock_imx21.c
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx3/clock-imx35.c
arch/arm/mach-mx3/clock.c
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/imote2.c
arch/arm/mm/proc-v7.S
drivers/ata/pata_netcell.c
drivers/ide/pdc202xx_old.c
drivers/mmc/host/mvsdio.c
drivers/mmc/host/mxcmmc.c
drivers/mmc/host/omap.c
drivers/mmc/host/omap_hsmmc.c
drivers/mmc/host/sdhci-of.c
drivers/serial/imx.c
include/linux/amba/serial.h
virt/kvm/kvm_main.c

index cb7a9e9..feaa75f 100644 (file)
@@ -7,4 +7,20 @@
 #define L1_CACHE_SHIFT         5
 #define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
 
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN  L1_CACHE_BYTES
+
+/*
+ * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
+ */
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define ARCH_SLAB_MINALIGN 8
+#endif
+
 #endif
index e6eb8a6..7b52277 100644 (file)
@@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
        (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
         VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-/*
- * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
- */
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
-#define ARCH_SLAB_MINALIGN 8
-#endif
-
 #include <asm-generic/page.h>
 
 #endif
index 999d013..e4b08ca 100644 (file)
@@ -890,7 +890,7 @@ static struct clk clko_clk = {
                .con_id = n, \
                .clk = &c, \
        },
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
 /* It's unlikely that any driver wants one of them directly:
        _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
        _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
index 3f7280c..2c97144 100644 (file)
@@ -621,7 +621,7 @@ DEFINE_CLOCK1(csi_clk,     0, 0,      0, parent, &csi_clk1, &per4_clk);
                .clk = &c, \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
index 53a112d..3c1e06f 100644 (file)
@@ -404,7 +404,7 @@ DEFINE_CLOCK(gpu2d_clk,  0, CCM_CGR3,  4, NULL, NULL);
                .clk = &c,              \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
        _REGISTER_CLOCK(NULL, "ata", ata_clk)
        _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
index 9957a11..a68fcf9 100644 (file)
@@ -516,7 +516,7 @@ DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
                .clk = &c, \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "emi", emi_clk)
        _REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
        _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
index d245e59..29970f7 100644 (file)
@@ -72,7 +72,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
 }
 
 
-static struct pxa2xx_udc_mach_info pxa_udc_info;
+static struct pxa2xx_udc_mach_info pxa_udc_info = {
+       .gpio_pullup = -1,
+       .gpio_vbus   = -1,
+};
 
 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
 {
index 2121309..2b27336 100644 (file)
@@ -412,7 +412,7 @@ static struct platform_device imote2_flash_device = {
  */
 static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
        { /* UCAM sensor board */
-               .type = "max1238",
+               .type = "max1239",
                .addr = 0x35,
        }, { /* ITS400 Sensor board only */
                .type = "max1363",
index 3397f1e..a08d9d2 100644 (file)
@@ -184,23 +184,37 @@ __v7_setup:
        stmia   r12, {r0-r5, r7, r9, r11, lr}
        bl      v7_flush_dcache_all
        ldmia   r12, {r0-r5, r7, r9, r11, lr}
+
+       mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
+       and     r10, r0, #0xff000000            @ ARM?
+       teq     r10, #0x41000000
+       bne     2f
+       and     r5, r0, #0x00f00000             @ variant
+       and     r6, r0, #0x0000000f             @ revision
+       orr     r0, r6, r5, lsr #20-4           @ combine variant and revision
+
 #ifdef CONFIG_ARM_ERRATA_430973
-       mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-       orr     r10, r10, #(1 << 6)             @ set IBE to 1
-       mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+       teq     r5, #0x00100000                 @ only present in r1p*
+       mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+       orreq   r10, r10, #(1 << 6)             @ set IBE to 1
+       mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_458693
-       mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-       orr     r10, r10, #(1 << 5)             @ set L1NEON to 1
-       orr     r10, r10, #(1 << 9)             @ set PLDNOP to 1
-       mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+       teq     r0, #0x20                       @ only present in r2p0
+       mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+       orreq   r10, r10, #(1 << 5)             @ set L1NEON to 1
+       orreq   r10, r10, #(1 << 9)             @ set PLDNOP to 1
+       mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_460075
-       mrc     p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
-       orr     r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
-       mcr     p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
+       teq     r0, #0x20                       @ only present in r2p0
+       mrceq   p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
+       tsteq   r10, #1 << 22
+       orreq   r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
+       mcreq   p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
 #endif
-       mov     r10, #0
+
+2:     mov     r10, #0
 #ifdef HARVARD_CACHE
        mcr     p15, 0, r10, c7, c5, 0          @ I+BTB cache invalidate
 #endif
index 9a69809..f0d52f7 100644 (file)
@@ -26,7 +26,7 @@ static unsigned int netcell_read_id(struct ata_device *adev,
        unsigned int err_mask = ata_do_dev_read_id(adev, tf, id);
        /* Firmware forgets to mark words 85-87 valid */
        if (err_mask == 0)
-               id[ATA_ID_CSF_DEFAULT] |= 0x0400;
+               id[ATA_ID_CSF_DEFAULT] |= 0x4000;
        return err_mask;
 }
 
index 248a54b..b3bc96f 100644 (file)
@@ -1,6 +1,6 @@
 /*
  *  Copyright (C) 1998-2002            Andre Hedrick <andre@linux-ide.org>
- *  Copyright (C) 2006-2007            MontaVista Software, Inc.
+ *  Copyright (C) 2006-2007, 2009      MontaVista Software, Inc.
  *  Copyright (C) 2007                 Bartlomiej Zolnierkiewicz
  *
  *  Portions Copyright (C) 1999 Promise Technology, Inc.
@@ -227,28 +227,19 @@ somebody_else:
        return (dma_stat & 4) == 4;     /* return 1 if INTR asserted */
 }
 
-static void pdc202xx_reset_host (ide_hwif_t *hwif)
+static void pdc202xx_reset(ide_drive_t *drive)
 {
+       ide_hwif_t *hwif        = drive->hwif;
        unsigned long high_16   = hwif->extra_base - 16;
        u8 udma_speed_flag      = inb(high_16 | 0x001f);
 
+       printk(KERN_WARNING "PDC202xx: software reset...\n");
+
        outb(udma_speed_flag | 0x10, high_16 | 0x001f);
        mdelay(100);
        outb(udma_speed_flag & ~0x10, high_16 | 0x001f);
        mdelay(2000);   /* 2 seconds ?! */
 
-       printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
-               hwif->channel ? "Secondary" : "Primary");
-}
-
-static void pdc202xx_reset (ide_drive_t *drive)
-{
-       ide_hwif_t *hwif        = drive->hwif;
-       ide_hwif_t *mate        = hwif->mate;
-
-       pdc202xx_reset_host(hwif);
-       pdc202xx_reset_host(mate);
-
        ide_set_max_pio(drive);
 }
 
@@ -328,9 +319,8 @@ static const struct ide_dma_ops pdc20246_dma_ops = {
        .dma_start              = ide_dma_start,
        .dma_end                = ide_dma_end,
        .dma_test_irq           = pdc202xx_dma_test_irq,
-       .dma_lost_irq           = pdc202xx_dma_lost_irq,
+       .dma_lost_irq           = ide_dma_lost_irq,
        .dma_timer_expiry       = ide_dma_sff_timer_expiry,
-       .dma_clear              = pdc202xx_reset,
        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
index c643d0f..b56d72f 100644 (file)
@@ -64,6 +64,31 @@ static int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data)
        unsigned int tmout;
        int tmout_index;
 
+       /*
+        * Hardware weirdness.  The FIFO_EMPTY bit of the HW_STATE
+        * register is sometimes not set before a while when some
+        * "unusual" data block sizes are used (such as with the SWITCH
+        * command), even despite the fact that the XFER_DONE interrupt
+        * was raised.  And if another data transfer starts before
+        * this bit comes to good sense (which eventually happens by
+        * itself) then the new transfer simply fails with a timeout.
+        */
+       if (!(mvsd_read(MVSD_HW_STATE) & (1 << 13))) {
+               unsigned long t = jiffies + HZ;
+               unsigned int hw_state,  count = 0;
+               do {
+                       if (time_after(jiffies, t)) {
+                               dev_warn(host->dev, "FIFO_EMPTY bit missing\n");
+                               break;
+                       }
+                       hw_state = mvsd_read(MVSD_HW_STATE);
+                       count++;
+               } while (!(hw_state & (1 << 13)));
+               dev_dbg(host->dev, "*** wait for FIFO_EMPTY bit "
+                                  "(hw=0x%04x, count=%d, jiffies=%ld)\n",
+                                  hw_state, count, jiffies - (t - HZ));
+       }
+
        /* If timeout=0 then maximum timeout index is used. */
        tmout = DIV_ROUND_UP(data->timeout_ns, host->ns_per_clk);
        tmout += data->timeout_clks;
@@ -620,9 +645,18 @@ static void mvsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
        if (ios->bus_width == MMC_BUS_WIDTH_4)
                ctrl_reg |= MVSD_HOST_CTRL_DATA_WIDTH_4_BITS;
 
+       /*
+        * The HI_SPEED_EN bit is causing trouble with many (but not all)
+        * high speed SD, SDHC and SDIO cards.  Not enabling that bit
+        * makes all cards work.  So let's just ignore that bit for now
+        * and revisit this issue if problems for not enabling this bit
+        * are ever reported.
+        */
+#if 0
        if (ios->timing == MMC_TIMING_MMC_HS ||
            ios->timing == MMC_TIMING_SD_HS)
                ctrl_reg |= MVSD_HOST_CTRL_HI_SPEED_EN;
+#endif
 
        host->ctrl = ctrl_reg;
        mvsd_write(MVSD_HOST_CTRL, ctrl_reg);
@@ -882,3 +916,4 @@ module_param(nodma, int, 0);
 MODULE_AUTHOR("Maen Suleiman, Nicolas Pitre");
 MODULE_DESCRIPTION("Marvell MMC,SD,SDIO Host Controller driver");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mvsdio");
index b4a615c..f4cbe47 100644 (file)
@@ -140,6 +140,8 @@ struct mxcmci_host {
        struct work_struct      datawork;
 };
 
+static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
+
 static inline int mxcmci_use_dma(struct mxcmci_host *host)
 {
        return host->do_dma;
@@ -160,7 +162,7 @@ static void mxcmci_softreset(struct mxcmci_host *host)
        writew(0xff, host->base + MMC_REG_RES_TO);
 }
 
-static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
+static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
 {
        unsigned int nob = data->blocks;
        unsigned int blksz = data->blksz;
@@ -168,6 +170,7 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
 #ifdef HAS_DMA
        struct scatterlist *sg;
        int i;
+       int ret;
 #endif
        if (data->flags & MMC_DATA_STREAM)
                nob = 0xffff;
@@ -183,7 +186,7 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
        for_each_sg(data->sg, sg, data->sg_len, i) {
                if (sg->offset & 3 || sg->length & 3) {
                        host->do_dma = 0;
-                       return;
+                       return 0;
                }
        }
 
@@ -192,23 +195,30 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
                host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
                                             data->sg_len,  host->dma_dir);
 
-               imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, datasize,
-                                host->res->start + MMC_REG_BUFFER_ACCESS,
-                                DMA_MODE_READ);
+               ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
+                               datasize,
+                               host->res->start + MMC_REG_BUFFER_ACCESS,
+                               DMA_MODE_READ);
        } else {
                host->dma_dir = DMA_TO_DEVICE;
                host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
                                             data->sg_len,  host->dma_dir);
 
-               imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, datasize,
-                                host->res->start + MMC_REG_BUFFER_ACCESS,
-                                DMA_MODE_WRITE);
+               ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
+                               datasize,
+                               host->res->start + MMC_REG_BUFFER_ACCESS,
+                               DMA_MODE_WRITE);
        }
 
+       if (ret) {
+               dev_err(mmc_dev(host->mmc), "failed to setup DMA : %d\n", ret);
+               return ret;
+       }
        wmb();
 
        imx_dma_enable(host->dma);
 #endif /* HAS_DMA */
+       return 0;
 }
 
 static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
@@ -345,8 +355,11 @@ static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask)
                stat = readl(host->base + MMC_REG_STATUS);
                if (stat & STATUS_ERR_MASK)
                        return stat;
-               if (time_after(jiffies, timeout))
+               if (time_after(jiffies, timeout)) {
+                       mxcmci_softreset(host);
+                       mxcmci_set_clk_rate(host, host->clock);
                        return STATUS_TIME_OUT_READ;
+               }
                if (stat & mask)
                        return 0;
                cpu_relax();
@@ -531,6 +544,7 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
 {
        struct mxcmci_host *host = mmc_priv(mmc);
        unsigned int cmdat = host->cmdat;
+       int error;
 
        WARN_ON(host->req != NULL);
 
@@ -540,7 +554,12 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
        host->do_dma = 1;
 #endif
        if (req->data) {
-               mxcmci_setup_data(host, req->data);
+               error = mxcmci_setup_data(host, req->data);
+               if (error) {
+                       req->cmd->error = error;
+                       goto out;
+               }
+
 
                cmdat |= CMD_DAT_CONT_DATA_ENABLE;
 
@@ -548,7 +567,9 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
                        cmdat |= CMD_DAT_CONT_WRITE;
        }
 
-       if (mxcmci_start_cmd(host, req->cmd, cmdat))
+       error = mxcmci_start_cmd(host, req->cmd, cmdat);
+out:
+       if (error)
                mxcmci_finish_request(host, req);
 }
 
@@ -724,7 +745,9 @@ static int mxcmci_probe(struct platform_device *pdev)
                goto out_clk_put;
        }
 
-       mmc->f_min = clk_get_rate(host->clk) >> 7;
+       mmc->f_min = clk_get_rate(host->clk) >> 16;
+       if (mmc->f_min < 400000)
+               mmc->f_min = 400000;
        mmc->f_max = clk_get_rate(host->clk) >> 1;
 
        /* recommended in data sheet */
index bfa25c0..dceb5ee 100644 (file)
@@ -822,7 +822,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
                del_timer(&host->cmd_abort_timer);
                host->abort = 1;
                OMAP_MMC_WRITE(host, IE, 0);
-               disable_irq(host->irq);
+               disable_irq_nosync(host->irq);
                schedule_work(&host->cmd_abort_work);
                return IRQ_HANDLED;
        }
index e62a22a..c40cb96 100644 (file)
@@ -680,7 +680,7 @@ static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
        host->dma_ch = -1;
        /*
         * DMA Callback: run in interrupt context.
-        * mutex_unlock will through a kernel warning if used.
+        * mutex_unlock will throw a kernel warning if used.
         */
        up(&host->sem);
 }
index 3ff4ac3..128c614 100644 (file)
@@ -55,7 +55,13 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
 
 static u16 esdhc_readw(struct sdhci_host *host, int reg)
 {
-       return in_be16(host->ioaddr + (reg ^ 0x2));
+       u16 ret;
+
+       if (unlikely(reg == SDHCI_HOST_VERSION))
+               ret = in_be16(host->ioaddr + reg);
+       else
+               ret = in_be16(host->ioaddr + (reg ^ 0x2));
+       return ret;
 }
 
 static u8 esdhc_readb(struct sdhci_host *host, int reg)
@@ -277,6 +283,7 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
 static const struct of_device_id sdhci_of_match[] = {
        { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
        { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
+       { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
        { .compatible = "generic-sdhci", },
        {},
 };
index 9f460b1..5f0be40 100644 (file)
@@ -1031,6 +1031,8 @@ imx_console_setup(struct console *co, char *options)
        if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
                co->index = 0;
        sport = imx_ports[co->index];
+       if(sport == NULL)
+               return -ENODEV;
 
        if (options)
                uart_parse_options(options, &baud, &parity, &bits, &flow);
index 48ee32a..64a982e 100644 (file)
 #define UART01x_FR_MODEM_ANY   (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
 
 #ifndef __ASSEMBLY__
+struct amba_device; /* in uncompress this is included but amba/bus.h is not */
 struct amba_pl010_data {
        void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
 };
index 1ecbe23..4293528 100644 (file)
@@ -2305,6 +2305,7 @@ int kvm_init(void *opaque, unsigned int vcpu_size,
                r = -ENOMEM;
                goto out_free_0;
        }
+       cpumask_clear(cpus_hardware_enabled);
 
        r = kvm_arch_hardware_setup();
        if (r < 0)