ARM: tegra: ahb: Enable prefetch for t114 SE
Shravani Dingari [Fri, 16 Nov 2012 11:06:42 +0000 (16:06 +0530)]
Bug 1167460, Bug 1156989

Change-Id: I12b7e84ff96f92050591ef40fb621d01f316ed8f
Signed-off-by: Shravani Dingari <shravanid@nvidia.com>
Reviewed-on: http://git-master/r/159530
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

arch/arm/mach-tegra/common.c

index fad6164..131ddb9 100644 (file)
@@ -66,6 +66,7 @@
 #define PRIORITY_SELECT_SDMMC4 BIT(12)
 #define   PRIORITY_SELECT_USB2 BIT(18)
 #define   PRIORITY_SELECT_USB3 BIT(17)
+#define   PRIORITY_SELECT_SE BIT(14)
 
 #define AHB_GIZMO_AHB_MEM              0xc
 #define   ENB_FAST_REARBITRATE BIT(2)
@@ -79,6 +80,7 @@
 #define AHB_GIZMO_SDMMC4       0x44
 #define AHB_GIZMO_USB2         0x78
 #define AHB_GIZMO_USB3         0x7c
+#define AHB_GIZMO_SE           0x4c
 #define   IMMEDIATE    BIT(18)
 
 #define AHB_MEM_PREFETCH_CFG5  0xc4
@@ -86,6 +88,7 @@
 #define AHB_MEM_PREFETCH_CFG4  0xe4
 #define AHB_MEM_PREFETCH_CFG1  0xec
 #define AHB_MEM_PREFETCH_CFG2  0xf0
+#define AHB_MEM_PREFETCH_CFG6  0xcc
 #define   PREFETCH_ENB BIT(31)
 #define   MST_ID(x)    (((x) & 0x1f) << 26)
 #define   AHBDMA_MST_ID        MST_ID(5)
@@ -93,6 +96,7 @@
 #define SDMMC4_MST_ID  MST_ID(12)
 #define   USB2_MST_ID  MST_ID(18)
 #define   USB3_MST_ID  MST_ID(17)
+#define   SE_MST_ID    MST_ID(14)
 #define   ADDR_BNDRY(x)        (((x) & 0xf) << 21)
 #define   INACTIVITY_TIMEOUT(x)        (((x) & 0xffff) << 0)
 
@@ -589,13 +593,17 @@ static void __init tegra_init_ahb_gizmo_settings(void)
        val = gizmo_readl(AHB_GIZMO_SDMMC4);
        val |= IMMEDIATE;
        gizmo_writel(val, AHB_GIZMO_SDMMC4);
+
+       val = gizmo_readl(AHB_GIZMO_SE);
+       val |= IMMEDIATE;
+       gizmo_writel(val, AHB_GIZMO_SE);
 #endif
 
        val = gizmo_readl(AHB_ARBITRATION_PRIORITY_CTRL);
        val |= PRIORITY_SELECT_USB | PRIORITY_SELECT_USB2 | PRIORITY_SELECT_USB3
                                | AHB_PRIORITY_WEIGHT(7);
 #if !defined(CONFIG_ARCH_TEGRA_2x_SOC) && !defined(CONFIG_ARCH_TEGRA_3x_SOC)
-       val |= PRIORITY_SELECT_SDMMC4;
+       val |= PRIORITY_SELECT_SE | PRIORITY_SELECT_SDMMC4;
 #endif
        gizmo_writel(val, AHB_ARBITRATION_PRIORITY_CTRL);
 
@@ -629,6 +637,12 @@ static void __init tegra_init_ahb_gizmo_settings(void)
        val |= PREFETCH_ENB | SDMMC4_MST_ID | ADDR_BNDRY(0xc) |
                INACTIVITY_TIMEOUT(0x1000);
        gizmo_writel(val, AHB_MEM_PREFETCH_CFG5);
+
+       val = gizmo_readl(AHB_MEM_PREFETCH_CFG6);
+       val &= ~MST_ID(~0);
+       val |= PREFETCH_ENB | SE_MST_ID | ADDR_BNDRY(0xc) |
+               INACTIVITY_TIMEOUT(0x1000);
+       gizmo_writel(val, AHB_MEM_PREFETCH_CFG6);
 #endif
 }