arm: tegra: Clock audio from clk_m
ScottPeterson [Wed, 18 Jan 2012 00:37:09 +0000 (16:37 -0800)]
Clock audio from clkm as
a pre-condition of disabling pllp_out1 and plla
when I2S is in slave mode.

Change-Id: I1706c2989cf7ad9045526ceba3326777b702868a

Reviewed-on: http://git-master/r/76391

Signed-off-by: ScottPeterson <speterson@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I243508cc553ebf22bb5594a9461019abfec24b65
Reviewed-on: http://git-master/r/77753
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rb035d65833f4dedbe67853010cbc38f3e92de9f9

arch/arm/mach-tegra/board-cardhu.c

index ce30afb..f443f80 100644 (file)
@@ -215,10 +215,10 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
        { "i2s1",       "pll_a_out0",   0,              false},
        { "i2s3",       "pll_a_out0",   0,              false},
        { "spdif_out",  "pll_a_out0",   0,              false},
-       { "d_audio",    "pll_a_out0",   0,              false},
-       { "dam0",       "pll_a_out0",   0,              false},
-       { "dam1",       "pll_a_out0",   0,              false},
-       { "dam2",       "pll_a_out0",   0,              false},
+       { "d_audio",    "clk_m",        12000000,       false},
+       { "dam0",       "clk_m",        12000000,       false},
+       { "dam1",       "clk_m",        12000000,       false},
+       { "dam2",       "clk_m",        12000000,       false},
        { "audio1",     "i2s1_sync",    0,              false},
        { "audio3",     "i2s3_sync",    0,              false},
        { "vi_sensor",  "pll_p",        150000000,      false},