Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
Russell King [Fri, 12 Feb 2010 14:32:01 +0000 (14:32 +0000)]
On PL111, as found on Realview and other platforms, these registers are
always arranged as CNTL then IENB.  On PL110, these registers are IENB
then CNTL, except on Versatile platforms.

Re-arrange the handling of these register swaps so that PL111 always
gets it right without resorting to ifdefs, leaving the only case needing
special handling being PL110 on Versatile.

Fill out amba/clcd.h with the PL110/PL111 register definition
differences in case someone tries to use the PL110 specific definitions
on PL111.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

drivers/video/amba-clcd.c
include/linux/amba/clcd.h

index a21efcd..afe21e6 100644 (file)
@@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb)
        if (fb->board->disable)
                fb->board->disable(fb);
 
-       val = readl(fb->regs + CLCD_CNTL);
+       val = readl(fb->regs + fb->off_cntl);
        if (val & CNTL_LCDPWR) {
                val &= ~CNTL_LCDPWR;
-               writel(val, fb->regs + CLCD_CNTL);
+               writel(val, fb->regs + fb->off_cntl);
 
                clcdfb_sleep(20);
        }
        if (val & CNTL_LCDEN) {
                val &= ~CNTL_LCDEN;
-               writel(val, fb->regs + CLCD_CNTL);
+               writel(val, fb->regs + fb->off_cntl);
        }
 
        /*
@@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
         * Bring up by first enabling..
         */
        cntl |= CNTL_LCDEN;
-       writel(cntl, fb->regs + CLCD_CNTL);
+       writel(cntl, fb->regs + fb->off_cntl);
 
        clcdfb_sleep(20);
 
@@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
         * and now apply power.
         */
        cntl |= CNTL_LCDPWR;
-       writel(cntl, fb->regs + CLCD_CNTL);
+       writel(cntl, fb->regs + fb->off_cntl);
 
        /*
         * finally, enable the interface.
@@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info)
                readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
                readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
                readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
-               readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL));
+               readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 #endif
 
        return 0;
@@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb)
 {
        int ret;
 
+       /*
+        * ARM PL111 always has IENB at 0x1c; it's only PL110
+        * which is reversed on some platforms.
+        */
+       if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
+               fb->off_ienb = CLCD_PL111_IENB;
+               fb->off_cntl = CLCD_PL111_CNTL;
+       } else {
+#ifdef CONFIG_ARCH_VERSATILE
+               fb->off_ienb = CLCD_PL111_IENB;
+               fb->off_cntl = CLCD_PL111_CNTL;
+#else
+               fb->off_ienb = CLCD_PL110_IENB;
+               fb->off_cntl = CLCD_PL110_CNTL;
+#endif
+       }
+
        fb->clk = clk_get(&fb->dev->dev, NULL);
        if (IS_ERR(fb->clk)) {
                ret = PTR_ERR(fb->clk);
@@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb)
        /*
         * Ensure interrupts are disabled.
         */
-       writel(0, fb->regs + CLCD_IENB);
+       writel(0, fb->regs + fb->off_ienb);
 
        fb_set_var(&fb->fb, &fb->fb.var);
 
index 29c0448..ca16c38 100644 (file)
 #define CLCD_UBAS              0x00000010
 #define CLCD_LBAS              0x00000014
 
-#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
-#define CLCD_IENB              0x00000018
-#define CLCD_CNTL              0x0000001c
-#else
-/*
- * Someone rearranged these two registers on the Versatile
- * platform...
- */
-#define CLCD_IENB              0x0000001c
-#define CLCD_CNTL              0x00000018
-#endif
-
-#define CLCD_STAT              0x00000020
-#define CLCD_INTR              0x00000024
-#define CLCD_UCUR              0x00000028
-#define CLCD_LCUR              0x0000002C
+#define CLCD_PL110_IENB                0x00000018
+#define CLCD_PL110_CNTL                0x0000001c
+#define CLCD_PL110_STAT                0x00000020
+#define CLCD_PL110_INTR        0x00000024
+#define CLCD_PL110_UCUR                0x00000028
+#define CLCD_PL110_LCUR                0x0000002C
+
+#define CLCD_PL111_CNTL                0x00000018
+#define CLCD_PL111_IENB                0x0000001c
+#define CLCD_PL111_RIS         0x00000020
+#define CLCD_PL111_MIS         0x00000024
+#define CLCD_PL111_ICR         0x00000028
+#define CLCD_PL111_UCUR                0x0000002c
+#define CLCD_PL111_LCUR                0x00000030
+
 #define CLCD_PALL              0x00000200
 #define CLCD_PALETTE           0x00000200
 
@@ -147,6 +146,8 @@ struct clcd_fb {
        struct clcd_board       *board;
        void                    *board_data;
        void __iomem            *regs;
+       u16                     off_ienb;
+       u16                     off_cntl;
        u32                     clcd_cntl;
        u32                     cmap[16];
 };