arm: tegra: correcting wfi sequence
venu byravarasu [Tue, 27 Sep 2011 06:56:46 +0000 (11:56 +0530)]
As per hardware documentation, dsb should precede wfi.
Hence fixing it.

Change-Id: I1c98581dfe3891d425ab36c1a2bb313e19ad046d
Reviewed-on: http://git-master/r/54626
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R3d7e46306d7d97c2cdfa0ec7ce658a1658724a76

arch/arm/mach-tegra/sleep-t3.S

index fa6e920..785239f 100644 (file)
@@ -583,8 +583,8 @@ tegra3_enter_sleep:
        ldr     r0, [r6, r2] /* memory barrier */
 
 halted:
-       dsb
        isb
+       dsb
        wfi     /* CPU should be power gated here */
 
        /* !!!FIXME!!! Implement halt failure handler */
@@ -594,7 +594,7 @@ halted:
  * tegra3_sdram_self_refresh
  *
  * called with MMU off and caches disabled
- * puts sdram in self refresh
+ /* puts sdram in self refresh
  * must execute from IRAM
  * r4 = TEGRA_PMC_BASE
  * r5 = TEGRA_CLK_RESET_BASE