ARM: tegra11: dvfs: Set CPU Vmin in DFLL mode 1.0V
Alex Frid [Sat, 18 May 2013 01:26:16 +0000 (18:26 -0700)]
Bug 1291764

Change-Id: I84a6854b0d7c85e602a6bc21d3fcb497613e5cae
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/230034
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>

arch/arm/mach-tegra/tegra11_dvfs.c

index 1ac0623..c1a8a56 100644 (file)
@@ -134,7 +134,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
                        .tune1          = 0x0000001f,
                        .droop_rate_min = 1000000,
                        .tune_high_min_millivolts = 1000,
-                       .min_millivolts = 900,
+                       .min_millivolts = 1000,
                },
                .max_mv = 1320,
                .freqs_mult = KHZ,
@@ -172,7 +172,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
                        .tune1          = 0x0000001f,
                        .droop_rate_min = 1000000,
                        .tune_high_min_millivolts = 1000,
-                       .min_millivolts = 900,
+                       .min_millivolts = 1000,
                },
                .max_mv = 1320,
                .freqs_mult = KHZ,
@@ -210,7 +210,7 @@ static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
                        .tune1          = 0x0000001f,
                        .droop_rate_min = 1000000,
                        .tune_high_min_millivolts = 1000,
-                       .min_millivolts = 900,
+                       .min_millivolts = 1000,
                },
                .max_mv = 1320,
                .freqs_mult = KHZ,