video: tegra: Add support for pin output overrides
Joseph Lehrer [Tue, 8 Feb 2011 19:47:47 +0000 (11:47 -0800)]
bug 773671

Original-Change-Id: Ia3d5ff4843a3da48a9a43123040b8bb75497cfef
Reviewed-on: http://git-master/r/18757
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Re392ebe1d7c334fcdd32a6a24c5acfcf7c56f925

arch/arm/mach-tegra/include/mach/dc.h
drivers/video/tegra/dc/dc_reg.h
drivers/video/tegra/dc/rgb.c

index 0b1b202..497fd8c 100644 (file)
@@ -72,6 +72,23 @@ enum {
        TEGRA_DC_ERRDIFF_DITHER,
 };
 
+enum {
+       TEGRA_PIN_OUT_CONFIG_SEL_LHP0_LD21,
+       TEGRA_PIN_OUT_CONFIG_SEL_LHP1_LD18,
+       TEGRA_PIN_OUT_CONFIG_SEL_LHP2_LD19,
+       TEGRA_PIN_OUT_CONFIG_SEL_LVP0_LVP0_Out,
+       TEGRA_PIN_OUT_CONFIG_SEL_LVP1_LD20,
+
+       TEGRA_PIN_OUT_CONFIG_SEL_LM1_M1,
+       TEGRA_PIN_OUT_CONFIG_SEL_LM1_LD21,
+       TEGRA_PIN_OUT_CONFIG_SEL_LM1_PM1,
+
+       TEGRA_PIN_OUT_CONFIG_SEL_LDI_LD22,
+       TEGRA_PIN_OUT_CONFIG_SEL_LPP_LD23,
+       TEGRA_PIN_OUT_CONFIG_SEL_LDC_SDC,
+       TEGRA_PIN_OUT_CONFIG_SEL_LSPI_DE,
+};
+
 struct tegra_dc_out {
        int                     type;
        unsigned                flags;
@@ -97,6 +114,9 @@ struct tegra_dc_out {
        struct tegra_dc_out_pin *out_pins;
        unsigned                n_out_pins;
 
+       u8                      *out_sel_configs;
+       unsigned                n_out_sel_configs;
+
        int     (*enable)(void);
        int     (*postpoweron)(void);
        int     (*disable)(void);
index eb830a2..7347352 100644 (file)
 #define DC_COM_PIN_OUTPUT_SELECT5              0x319
 #define DC_COM_PIN_OUTPUT_SELECT6              0x31a
 
+#define PIN5_LM1_LCD_M1_OUTPUT_MASK    (7 << 4)
+#define PIN5_LM1_LCD_M1_OUTPUT_M1      (0 << 4)
+#define PIN5_LM1_LCD_M1_OUTPUT_LD21    (2 << 4)
+#define PIN5_LM1_LCD_M1_OUTPUT_PM1     (3 << 4)
+
 #define  PIN1_LHS_OUTPUT               (1 << 30)
 #define  PIN1_LVS_OUTPUT               (1 << 28)
 
index b0652f1..adef3f4 100644 (file)
@@ -36,6 +36,9 @@ static const u32 tegra_dc_rgb_enable_pintable[] = {
        DC_COM_PIN_OUTPUT_DATA1,        0x00000000,
        DC_COM_PIN_OUTPUT_DATA2,        0x00000000,
        DC_COM_PIN_OUTPUT_DATA3,        0x00000000,
+};
+
+static const u32 tegra_dc_rgb_enable_out_sel_pintable[] = {
        DC_COM_PIN_OUTPUT_SELECT0,      0x00000000,
        DC_COM_PIN_OUTPUT_SELECT1,      0x00000000,
        DC_COM_PIN_OUTPUT_SELECT2,      0x00000000,
@@ -69,6 +72,9 @@ static const u32 tegra_dc_rgb_disable_pintable[] = {
 
 void tegra_dc_rgb_enable(struct tegra_dc *dc)
 {
+       int i;
+       u32 out_sel_pintable[ARRAY_SIZE(tegra_dc_rgb_enable_out_sel_pintable)];
+
        tegra_dc_writel(dc, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE |
                        PW4_ENABLE | PM0_ENABLE | PM1_ENABLE,
                        DC_CMD_DISPLAY_POWER_CONTROL);
@@ -76,6 +82,42 @@ void tegra_dc_rgb_enable(struct tegra_dc *dc)
        tegra_dc_writel(dc, DISP_CTRL_MODE_C_DISPLAY, DC_CMD_DISPLAY_COMMAND);
 
        tegra_dc_write_table(dc, tegra_dc_rgb_enable_pintable);
+
+       memcpy(out_sel_pintable, tegra_dc_rgb_enable_out_sel_pintable,
+               sizeof(tegra_dc_rgb_enable_out_sel_pintable));
+
+       if (dc->out && dc->out->out_sel_configs) {
+               u8 *out_sels = dc->out->out_sel_configs;
+               for (i = 0; i < dc->out->n_out_sel_configs; i++) {
+                       switch (out_sels[i]) {
+                       case TEGRA_PIN_OUT_CONFIG_SEL_LM1_M1:
+                               out_sel_pintable[5*2+1] =
+                                       (out_sel_pintable[5*2+1] &
+                                       ~PIN5_LM1_LCD_M1_OUTPUT_MASK) |
+                                       PIN5_LM1_LCD_M1_OUTPUT_M1;
+                               break;
+                       case TEGRA_PIN_OUT_CONFIG_SEL_LM1_LD21:
+                               out_sel_pintable[5*2+1] =
+                                       (out_sel_pintable[5*2+1] &
+                                       ~PIN5_LM1_LCD_M1_OUTPUT_MASK) |
+                                       PIN5_LM1_LCD_M1_OUTPUT_LD21;
+                               break;
+                       case TEGRA_PIN_OUT_CONFIG_SEL_LM1_PM1:
+                               out_sel_pintable[5*2+1] =
+                                       (out_sel_pintable[5*2+1] &
+                                       ~PIN5_LM1_LCD_M1_OUTPUT_MASK) |
+                                       PIN5_LM1_LCD_M1_OUTPUT_PM1;
+                               break;
+                       default:
+                               dev_err(&dc->ndev->dev,
+                                       "Invalid pin config[%d]: %d\n",
+                                        i, out_sels[i]);
+                               break;
+                       }
+               }
+       }
+
+       tegra_dc_write_table(dc, out_sel_pintable);
 }
 
 void tegra_dc_rgb_disable(struct tegra_dc *dc)