Merge branch 'tegra/cleanups' into next/timer
Arnd Bergmann [Wed, 21 Mar 2012 14:27:34 +0000 (14:27 +0000)]
Conflicts:
arch/arm/mach-tegra/Makefile
arch/arm/mach-vexpress/core.h

The tegra Makefile was changed in four different branches
in the same line. This merge should reduce the amount
of churn.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

207 files changed:
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/include/asm/hardware/entry-macro-iomd.S
arch/arm/include/asm/system.h
arch/arm/kernel/entry-armv.S
arch/arm/kernel/entry-common.S
arch/arm/kernel/process.c
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91rm9200.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/at91x40.c
arch/arm/mach-at91/include/mach/entry-macro.S
arch/arm/mach-at91/include/mach/system.h [deleted file]
arch/arm/mach-bcmring/core.c
arch/arm/mach-bcmring/include/mach/entry-macro.S
arch/arm/mach-bcmring/include/mach/system.h [deleted file]
arch/arm/mach-clps711x/common.c
arch/arm/mach-clps711x/include/mach/entry-macro.S
arch/arm/mach-clps711x/include/mach/system.h [deleted file]
arch/arm/mach-cns3xxx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-cns3xxx/include/mach/system.h [deleted file]
arch/arm/mach-davinci/include/mach/entry-macro.S
arch/arm/mach-davinci/include/mach/system.h [deleted file]
arch/arm/mach-dove/include/mach/entry-macro.S
arch/arm/mach-dove/include/mach/system.h [deleted file]
arch/arm/mach-ebsa110/core.c
arch/arm/mach-ebsa110/include/mach/entry-macro.S
arch/arm/mach-ebsa110/include/mach/system.h [deleted file]
arch/arm/mach-ep93xx/core.c
arch/arm/mach-ep93xx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-ep93xx/include/mach/system.h [deleted file]
arch/arm/mach-exynos/common.c
arch/arm/mach-exynos/dma.c
arch/arm/mach-exynos/include/mach/entry-macro.S [deleted file]
arch/arm/mach-exynos/include/mach/system.h [deleted file]
arch/arm/mach-footbridge/include/mach/entry-macro.S
arch/arm/mach-footbridge/include/mach/system.h [deleted file]
arch/arm/mach-gemini/Makefile
arch/arm/mach-gemini/idle.c [new file with mode: 0644]
arch/arm/mach-gemini/include/mach/entry-macro.S
arch/arm/mach-gemini/include/mach/system.h
arch/arm/mach-gemini/irq.c
arch/arm/mach-h720x/common.c
arch/arm/mach-h720x/include/mach/entry-macro.S
arch/arm/mach-h720x/include/mach/system.h [deleted file]
arch/arm/mach-highbank/include/mach/entry-macro.S [deleted file]
arch/arm/mach-highbank/include/mach/system.h [deleted file]
arch/arm/mach-imx/mm-imx3.c
arch/arm/mach-imx/mm-imx5.c
arch/arm/mach-imx/pm-imx27.c
arch/arm/mach-integrator/core.c
arch/arm/mach-integrator/impd1.c
arch/arm/mach-integrator/include/mach/entry-macro.S
arch/arm/mach-integrator/include/mach/system.h [deleted file]
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-iop13xx/include/mach/entry-macro.S
arch/arm/mach-iop13xx/include/mach/system.h [deleted file]
arch/arm/mach-iop32x/include/mach/entry-macro.S
arch/arm/mach-iop32x/include/mach/system.h [deleted file]
arch/arm/mach-iop33x/include/mach/entry-macro.S
arch/arm/mach-iop33x/include/mach/system.h [deleted file]
arch/arm/mach-ixp2000/include/mach/entry-macro.S
arch/arm/mach-ixp2000/include/mach/system.h [deleted file]
arch/arm/mach-ixp23xx/core.c
arch/arm/mach-ixp23xx/include/mach/entry-macro.S
arch/arm/mach-ixp23xx/include/mach/system.h [deleted file]
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/include/mach/entry-macro.S
arch/arm/mach-ixp4xx/include/mach/system.h [deleted file]
arch/arm/mach-kirkwood/include/mach/entry-macro.S
arch/arm/mach-kirkwood/include/mach/system.h [deleted file]
arch/arm/mach-ks8695/include/mach/entry-macro.S
arch/arm/mach-ks8695/include/mach/system.h [deleted file]
arch/arm/mach-lpc32xx/include/mach/entry-macro.S
arch/arm/mach-lpc32xx/include/mach/system.h [deleted file]
arch/arm/mach-lpc32xx/phy3250.c
arch/arm/mach-mmp/include/mach/entry-macro.S
arch/arm/mach-mmp/include/mach/system.h [deleted file]
arch/arm/mach-msm/idle.S [deleted file]
arch/arm/mach-msm/idle.c [new file with mode: 0644]
arch/arm/mach-msm/include/mach/entry-macro.S
arch/arm/mach-msm/include/mach/system.h
arch/arm/mach-mv78xx0/include/mach/entry-macro.S
arch/arm/mach-mv78xx0/include/mach/system.h [deleted file]
arch/arm/mach-mxs/devices.c
arch/arm/mach-mxs/devices/amba-duart.c
arch/arm/mach-mxs/include/mach/entry-macro.S
arch/arm/mach-mxs/include/mach/system.h [deleted file]
arch/arm/mach-mxs/pm.c
arch/arm/mach-netx/fb.c
arch/arm/mach-netx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-netx/include/mach/system.h [deleted file]
arch/arm/mach-nomadik/board-nhk8815.c
arch/arm/mach-nomadik/cpu-8815.c
arch/arm/mach-nomadik/include/mach/entry-macro.S [deleted file]
arch/arm/mach-nomadik/include/mach/system.h [deleted file]
arch/arm/mach-omap1/include/mach/entry-macro.S
arch/arm/mach-omap1/include/mach/system.h [deleted file]
arch/arm/mach-omap1/pm.c
arch/arm/mach-omap2/emu.c
arch/arm/mach-omap2/include/mach/entry-macro.S [deleted file]
arch/arm/mach-omap2/include/mach/system.h [deleted file]
arch/arm/mach-omap2/pm24xx.c
arch/arm/mach-omap2/pm34xx.c
arch/arm/mach-omap2/pm44xx.c
arch/arm/mach-omap2/prm_common.c
arch/arm/mach-orion5x/include/mach/entry-macro.S
arch/arm/mach-orion5x/include/mach/system.h [deleted file]
arch/arm/mach-picoxcell/include/mach/entry-macro.S [deleted file]
arch/arm/mach-picoxcell/include/mach/system.h [deleted file]
arch/arm/mach-pnx4008/include/mach/entry-macro.S
arch/arm/mach-pnx4008/include/mach/system.h [deleted file]
arch/arm/mach-prima2/include/mach/entry-macro.S
arch/arm/mach-prima2/include/mach/system.h [deleted file]
arch/arm/mach-pxa/include/mach/entry-macro.S [deleted file]
arch/arm/mach-pxa/include/mach/system.h [deleted file]
arch/arm/mach-realview/core.h
arch/arm/mach-realview/include/mach/entry-macro.S [deleted file]
arch/arm/mach-realview/include/mach/irqs-pb1176.h
arch/arm/mach-realview/include/mach/system.h [deleted file]
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-rpc/Makefile
arch/arm/mach-rpc/fiq.S [new file with mode: 0644]
arch/arm/mach-rpc/include/mach/entry-macro.S
arch/arm/mach-rpc/include/mach/system.h [deleted file]
arch/arm/mach-rpc/irq.c
arch/arm/mach-s3c2410/include/mach/entry-macro.S
arch/arm/mach-s3c2410/include/mach/system.h [deleted file]
arch/arm/mach-s3c2412/s3c2412.c
arch/arm/mach-s3c2416/s3c2416.c
arch/arm/mach-s3c64xx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-s3c64xx/include/mach/system.h [deleted file]
arch/arm/mach-s5p64x0/common.c
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/include/mach/entry-macro.S [deleted file]
arch/arm/mach-s5p64x0/include/mach/system.h [deleted file]
arch/arm/mach-s5pc100/common.c
arch/arm/mach-s5pc100/dma.c
arch/arm/mach-s5pc100/include/mach/entry-macro.S
arch/arm/mach-s5pc100/include/mach/system.h [deleted file]
arch/arm/mach-s5pv210/common.c
arch/arm/mach-s5pv210/dma.c
arch/arm/mach-s5pv210/include/mach/entry-macro.S [deleted file]
arch/arm/mach-s5pv210/include/mach/system.h [deleted file]
arch/arm/mach-sa1100/include/mach/entry-macro.S
arch/arm/mach-sa1100/include/mach/system.h [deleted file]
arch/arm/mach-shark/core.c
arch/arm/mach-shark/include/mach/entry-macro.S
arch/arm/mach-shark/include/mach/system.h [deleted file]
arch/arm/mach-shmobile/include/mach/entry-macro.S [deleted file]
arch/arm/mach-shmobile/include/mach/system.h
arch/arm/mach-spear3xx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-spear3xx/include/mach/system.h [deleted file]
arch/arm/mach-spear3xx/spear300.c
arch/arm/mach-spear3xx/spear3xx.c
arch/arm/mach-spear6xx/include/mach/entry-macro.S [deleted file]
arch/arm/mach-spear6xx/include/mach/system.h [deleted file]
arch/arm/mach-spear6xx/spear6xx.c
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-harmony-pinmux.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/include/mach/entry-macro.S [deleted file]
arch/arm/mach-tegra/include/mach/system.h [deleted file]
arch/arm/mach-tegra/pcie.c
arch/arm/mach-tegra/usb_phy.c
arch/arm/mach-u300/core.c
arch/arm/mach-u300/include/mach/entry-macro.S [deleted file]
arch/arm/mach-u300/include/mach/system.h [deleted file]
arch/arm/mach-ux500/devices-common.c
arch/arm/mach-ux500/include/mach/entry-macro.S [deleted file]
arch/arm/mach-ux500/include/mach/system.h [deleted file]
arch/arm/mach-versatile/core.c
arch/arm/mach-versatile/core.h
arch/arm/mach-versatile/include/mach/entry-macro.S [deleted file]
arch/arm/mach-versatile/include/mach/system.h [deleted file]
arch/arm/mach-versatile/versatile_pb.c
arch/arm/mach-vexpress/core.h
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
arch/arm/mach-vexpress/include/mach/entry-macro.S [deleted file]
arch/arm/mach-vexpress/include/mach/system.h [deleted file]
arch/arm/mach-vexpress/v2m.c
arch/arm/mach-vt8500/include/mach/entry-macro.S
arch/arm/mach-vt8500/include/mach/system.h
arch/arm/mach-w90x900/dev.c
arch/arm/mach-w90x900/include/mach/entry-macro.S
arch/arm/mach-w90x900/include/mach/system.h [deleted file]
arch/arm/mach-zynq/include/mach/entry-macro.S [deleted file]
arch/arm/mach-zynq/include/mach/system.h [deleted file]
arch/arm/plat-mxc/include/mach/entry-macro.S [deleted file]
arch/arm/plat-mxc/include/mach/system.h [deleted file]
arch/arm/plat-omap/include/plat/system.h [deleted file]
arch/arm/plat-s3c24xx/cpu.c
arch/arm/plat-spear/include/plat/system.h [deleted file]
drivers/amba/bus.c
drivers/mmc/host/mmci.c
drivers/of/platform.c
include/linux/amba/bus.h

index dfb0312..87693e6 100644 (file)
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
 config FIQ
        bool
 
+config NEED_RET_TO_USER
+       bool
+
 config ARCH_MTD_XIP
        bool
 
@@ -479,6 +482,7 @@ config ARCH_IOP13XX
        select ARCH_SUPPORTS_MSI
        select VMSPLIT_1G
        select NEED_MACH_MEMORY_H
+       select NEED_RET_TO_USER
        help
          Support for Intel's IOP13XX (XScale) family of processors.
 
@@ -486,6 +490,7 @@ config ARCH_IOP32X
        bool "IOP32x-based"
        depends on MMU
        select CPU_XSCALE
+       select NEED_RET_TO_USER
        select PLAT_IOP
        select PCI
        select ARCH_REQUIRE_GPIOLIB
@@ -497,6 +502,7 @@ config ARCH_IOP33X
        bool "IOP33x-based"
        depends on MMU
        select CPU_XSCALE
+       select NEED_RET_TO_USER
        select PLAT_IOP
        select PCI
        select ARCH_REQUIRE_GPIOLIB
index e0d236d..03646c4 100644 (file)
@@ -81,25 +81,6 @@ choice
        prompt "Kernel low-level debugging port"
        depends on DEBUG_LL
 
-       config DEBUG_LL_UART_NONE
-               bool "No low-level debugging UART"
-               help
-                 Say Y here if your platform doesn't provide a UART option
-                 below. This relies on your platform choosing the right UART
-                 definition internally in order for low-level debugging to
-                 work.
-
-       config DEBUG_ICEDCC
-               bool "Kernel low-level debugging via EmbeddedICE DCC channel"
-               help
-                 Say Y here if you want the debug print routines to direct
-                 their output to the EmbeddedICE macrocell's DCC channel using
-                 co-processor 14. This is known to work on the ARM9 style ICE
-                 channel and on the XScale with the PEEDI.
-
-                 Note that the system will appear to hang during boot if there
-                 is nothing connected to read from the DCC.
-
        config AT91_DEBUG_LL_DBGU0
                bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
                depends on HAVE_AT91_DBGU0
@@ -108,20 +89,6 @@ choice
                bool "Kernel low-level debugging on 9263, 9g45 and cap9"
                depends on HAVE_AT91_DBGU1
 
-       config DEBUG_FOOTBRIDGE_COM1
-               bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
-               depends on FOOTBRIDGE
-               help
-                 Say Y here if you want the debug print routines to direct
-                 their output to the 8250 at PCI COM1.
-
-       config DEBUG_DC21285_PORT
-               bool "Kernel low-level debugging messages via footbridge serial port"
-               depends on FOOTBRIDGE
-               help
-                 Say Y here if you want the debug print routines to direct
-                 their output to the serial port in the DC21285 (Footbridge).
-
        config DEBUG_CLPS711X_UART1
                bool "Kernel low-level debugging messages via UART1"
                depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice
                  Say Y here if you want the debug print routines to direct
                  their output to the second serial port on these devices.
 
+       config DEBUG_DC21285_PORT
+               bool "Kernel low-level debugging messages via footbridge serial port"
+               depends on FOOTBRIDGE
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the serial port in the DC21285 (Footbridge).
+
+       config DEBUG_FOOTBRIDGE_COM1
+               bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
+               depends on FOOTBRIDGE
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the 8250 at PCI COM1.
+
        config DEBUG_HIGHBANK_UART
                bool "Kernel low-level debugging messages via Highbank UART"
                depends on ARCH_HIGHBANK
@@ -206,38 +187,42 @@ choice
                  Say Y here if you want kernel low-level debugging support
                  on i.MX6Q.
 
-       config DEBUG_S3C_UART0
-               depends on PLAT_SAMSUNG
-               bool "Use S3C UART 0 for low-level debug"
+       config DEBUG_MSM_UART1
+               bool "Kernel low-level debugging messages via MSM UART1"
+               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to UART 0. The port must have been initialised
-                 by the boot-loader before use.
-
-                 The uncompressor code port configuration is now handled
-                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+                 their output to the first serial port on MSM devices.
 
-       config DEBUG_S3C_UART1
-               depends on PLAT_SAMSUNG
-               bool "Use S3C UART 1 for low-level debug"
+       config DEBUG_MSM_UART2
+               bool "Kernel low-level debugging messages via MSM UART2"
+               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to UART 1. The port must have been initialised
-                 by the boot-loader before use.
+                 their output to the second serial port on MSM devices.
 
-                 The uncompressor code port configuration is now handled
-                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+       config DEBUG_MSM_UART3
+               bool "Kernel low-level debugging messages via MSM UART3"
+               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the third serial port on MSM devices.
 
-       config DEBUG_S3C_UART2
-               depends on PLAT_SAMSUNG
-               bool "Use S3C UART 2 for low-level debug"
+       config DEBUG_MSM8660_UART
+               bool "Kernel low-level debugging messages via MSM 8660 UART"
+               depends on ARCH_MSM8X60
+               select MSM_HAS_DEBUG_UART_HS
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to UART 2. The port must have been initialised
-                 by the boot-loader before use.
+                 their output to the serial port on MSM 8660 devices.
 
-                 The uncompressor code port configuration is now handled
-                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+       config DEBUG_MSM8960_UART
+               bool "Kernel low-level debugging messages via MSM 8960 UART"
+               depends on ARCH_MSM8960
+               select MSM_HAS_DEBUG_UART_HS
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the serial port on MSM 8960 devices.
 
        config DEBUG_REALVIEW_STD_PORT
                bool "RealView Default UART"
@@ -255,42 +240,57 @@ choice
                  their output to the standard serial port on the RealView
                  PB1176 platform.
 
-       config DEBUG_MSM_UART1
-               bool "Kernel low-level debugging messages via MSM UART1"
-               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+       config DEBUG_S3C_UART0
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 0 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to the first serial port on MSM devices.
+                 their output to UART 0. The port must have been initialised
+                 by the boot-loader before use.
 
-       config DEBUG_MSM_UART2
-               bool "Kernel low-level debugging messages via MSM UART2"
-               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+       config DEBUG_S3C_UART1
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 1 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to the second serial port on MSM devices.
+                 their output to UART 1. The port must have been initialised
+                 by the boot-loader before use.
 
-       config DEBUG_MSM_UART3
-               bool "Kernel low-level debugging messages via MSM UART3"
-               depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+       config DEBUG_S3C_UART2
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 2 for low-level debug"
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to the third serial port on MSM devices.
+                 their output to UART 2. The port must have been initialised
+                 by the boot-loader before use.
 
-       config DEBUG_MSM8660_UART
-               bool "Kernel low-level debugging messages via MSM 8660 UART"
-               depends on ARCH_MSM8X60
-               select MSM_HAS_DEBUG_UART_HS
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+
+       config DEBUG_LL_UART_NONE
+               bool "No low-level debugging UART"
                help
-                 Say Y here if you want the debug print routines to direct
-                 their output to the serial port on MSM 8660 devices.
+                 Say Y here if your platform doesn't provide a UART option
+                 below. This relies on your platform choosing the right UART
+                 definition internally in order for low-level debugging to
+                 work.
 
-       config DEBUG_MSM8960_UART
-               bool "Kernel low-level debugging messages via MSM 8960 UART"
-               depends on ARCH_MSM8960
-               select MSM_HAS_DEBUG_UART_HS
+       config DEBUG_ICEDCC
+               bool "Kernel low-level debugging via EmbeddedICE DCC channel"
                help
                  Say Y here if you want the debug print routines to direct
-                 their output to the serial port on MSM 8960 devices.
+                 their output to the EmbeddedICE macrocell's DCC channel using
+                 co-processor 14. This is known to work on the ARM9 style ICE
+                 channel and on the XScale with the PEEDI.
+
+                 Note that the system will appear to hang during boot if there
+                 is nothing connected to read from the DCC.
 
 endchoice
 
index e0af498..8c215ac 100644 (file)
 /* IOC / IOMD based hardware */
 #include <asm/hardware/iomd.h>
 
-               .macro  disable_fiq
-               mov     r12, #ioc_base_high
-               .if     ioc_base_low
-               orr     r12, r12, #ioc_base_low
-               .endif
-               strb    r12, [r12, #0x38]       @ Disable FIQ register
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldrb    \irqstat, [\base, #IOMD_IRQREQB]        @ get high priority first
                ldr     \tmp, =irq_prio_h
index e4c96cc..424aa45 100644 (file)
@@ -110,6 +110,7 @@ extern void cpu_init(void);
 
 void soft_restart(unsigned long);
 extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_idle)(void);
 
 #define UDBG_UNDEFINED (1 << 0)
 #define UDBG_SYSCALL   (1 << 1)
index be16a48..22f0ed3 100644 (file)
@@ -19,7 +19,9 @@
 #include <asm/glue-df.h>
 #include <asm/glue-pf.h>
 #include <asm/vfpmacros.h>
+#ifndef CONFIG_MULTI_IRQ_HANDLER
 #include <mach/entry-macro.S>
+#endif
 #include <asm/thread_notify.h>
 #include <asm/unwind.h>
 #include <asm/unistd.h>
@@ -1101,7 +1103,6 @@ __stubs_start:
  * get out of that mode without clobbering one register.
  */
 vector_fiq:
-       disable_fiq
        subs    pc, lr, #4
 
 /*=============================================================================
index 9fd0ba9..54ee265 100644 (file)
 
 #include <asm/unistd.h>
 #include <asm/ftrace.h>
-#include <mach/entry-macro.S>
 #include <asm/unwind.h>
 
+#ifdef CONFIG_NEED_RET_TO_USER
+#include <mach/entry-macro.S>
+#else
+       .macro  arch_ret_to_user, tmp1, tmp2
+       .endm
+#endif
+
 #include "entry-header.S"
 
 
index 971d65c..008e7ce 100644 (file)
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
 
 static volatile int hlt_counter;
 
-#include <mach/system.h>
-
 void disable_hlt(void)
 {
        hlt_counter++;
@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 
 /*
- * This is our default idle handler.  We need to disable
- * interrupts here to ensure we don't miss a wakeup call.
+ * This is our default idle handler.
  */
+
+void (*arm_pm_idle)(void);
+
 static void default_idle(void)
 {
-       if (!need_resched())
-               arch_idle();
+       if (arm_pm_idle)
+               arm_pm_idle();
+       else
+               cpu_do_idle();
        local_irq_enable();
 }
 
@@ -215,6 +217,10 @@ void cpu_idle(void)
                                cpu_die();
 #endif
 
+                       /*
+                        * We need to disable interrupts here
+                        * to ensure we don't miss a wakeup call.
+                        */
                        local_irq_disable();
 #ifdef CONFIG_PL310_ERRATA_769419
                        wmb();
@@ -222,19 +228,18 @@ void cpu_idle(void)
                        if (hlt_counter) {
                                local_irq_enable();
                                cpu_relax();
-                       } else {
+                       } else if (!need_resched()) {
                                stop_critical_timings();
                                if (cpuidle_idle_call())
                                        pm_idle();
                                start_critical_timings();
                                /*
-                                * This will eventually be removed - pm_idle
-                                * functions should always return with IRQs
-                                * enabled.
+                                * pm_idle functions must always
+                                * return with IRQs enabled.
                                 */
                                WARN_ON(irqs_disabled());
+                       } else
                                local_irq_enable();
-                       }
                }
                leds_event(led_idle_end);
                rcu_idle_exit();
index a42edc2..8967d75 100644 (file)
@@ -14,6 +14,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
        }
 };
 
+static void at91cap9_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 /* --------------------------------------------------------------------
  *  AT91CAP9 processor initialization
  * -------------------------------------------------------------------- */
@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void)
 
 static void __init at91cap9_initialize(void)
 {
+       arm_pm_idle = at91cap9_idle;
        arm_pm_restart = at91sam9g45_restart;
        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 
index 99c3174..dd6e2de 100644 (file)
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
        }
 };
 
+static void at91rm9200_idle(void)
+{
+       /*
+        * Disable the processor clock.  The processor will be automatically
+        * re-enabled by an interrupt or by a reset.
+        */
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+}
+
 static void at91rm9200_restart(char mode, const char *cmd)
 {
        /*
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void)
 
 static void __init at91rm9200_initialize(void)
 {
+       arm_pm_idle = at91rm9200_idle;
        arm_pm_restart = at91rm9200_restart;
        at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                        | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
index d4036ba..9ac8c6f 100644 (file)
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void)
        at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
 }
 
+static void at91sam9260_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 static void __init at91sam9260_initialize(void)
 {
+       arm_pm_idle = at91sam9260_idle;
        arm_pm_restart = at91sam9_alt_restart;
        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                        | (1 << AT91SAM9260_ID_IRQ2);
index 023c2ff..ab76868 100644 (file)
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void)
        at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
 }
 
+static void at91sam9261_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 static void __init at91sam9261_initialize(void)
 {
+       arm_pm_idle = at91sam9261_idle;
        arm_pm_restart = at91sam9_alt_restart;
        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                        | (1 << AT91SAM9261_ID_IRQ2);
index 75e876c..247ab63 100644 (file)
@@ -12,6 +12,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void)
        at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
 }
 
+static void at91sam9263_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 static void __init at91sam9263_initialize(void)
 {
+       arm_pm_idle = at91sam9263_idle;
        arm_pm_restart = at91sam9_alt_restart;
        at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
index 1cb6a96..5b12192 100644 (file)
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
        }
 };
 
+static void at91sam9g45_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void)
 
 static void __init at91sam9g45_initialize(void)
 {
+       arm_pm_idle = at91sam9g45_idle;
        arm_pm_restart = at91sam9g45_restart;
        at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
index d2c91a8..fd60e22 100644 (file)
@@ -11,6 +11,7 @@
 
 #include <linux/module.h>
 
+#include <asm/proc-fns.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void)
        at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
 }
 
+static void at91sam9rl_idle(void)
+{
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+       cpu_do_idle();
+}
+
 static void __init at91sam9rl_initialize(void)
 {
+       arm_pm_idle = at91sam9rl_idle;
        arm_pm_restart = at91sam9_alt_restart;
        at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
index 56ba3bd..0154b7f 100644 (file)
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <mach/at91x40.h>
 #include <mach/at91_st.h>
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
        return AT91X40_MASTER_CLOCK;
 }
 
+static void at91x40_idle(void)
+{
+       /*
+        * Disable the processor clock.  The processor will be automatically
+        * re-enabled by an interrupt or by a reset.
+        */
+       at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
+       cpu_do_idle();
+}
+
 void __init at91x40_initialize(unsigned long main_clock)
 {
+       arm_pm_idle = at91x40_idle;
        at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
                        | (1 << AT91X40_ID_IRQ2);
 }
index 423eea0..903bf20 100644 (file)
 #include <mach/hardware.h>
 #include <mach/at91_aic.h>
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =at91_aic_base           @ base virtual address of AIC peripheral
        ldr     \base, [\base]
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr     \irqnr, [\base, #AT91_AIC_IVR]          @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
        ldr     \irqstat, [\base, #AT91_AIC_ISR]        @ read interrupt source number
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
deleted file mode 100644 (file)
index cbd64f3..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/system.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/hardware.h>
-#include <mach/at91_st.h>
-#include <mach/at91_dbgu.h>
-#include <mach/at91_pmc.h>
-
-static inline void arch_idle(void)
-{
-       /*
-        * Disable the processor clock.  The processor will be automatically
-        * re-enabled by an interrupt or by a reset.
-        */
-#ifdef AT91_PS
-       at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
-#else
-       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
-#endif
-#ifndef CONFIG_CPU_ARM920T
-       /*
-        * Set the processor (CP15) into 'Wait for Interrupt' mode.
-        * Post-RM9200 processors need this in conjunction with the above
-        * to save power when idle.
-        */
-       cpu_do_idle();
-#endif
-}
-
-#endif
index 6b67b7e..22e4e0a 100644 (file)
 #include <mach/csp/chipcHw_inline.h>
 #include <mach/csp/tmrHw_reg.h>
 
-#define AMBA_DEVICE(name, initname, base, plat, size)       \
-static struct amba_device name##_device = {     \
-   .dev = {                                     \
-      .coherent_dma_mask = ~0,                  \
-      .init_name = initname,                    \
-      .platform_data = plat                     \
-   },                                           \
-   .res = {                                     \
-      .start = MM_ADDR_IO_##base,               \
-               .end = MM_ADDR_IO_##base + (size) - 1,    \
-      .flags = IORESOURCE_MEM                   \
-   },                                           \
-   .dma_mask = ~0,                              \
-   .irq = {                                     \
-      IRQ_##base                                \
-   }                                            \
-}
-
-
-AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
-AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
+static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
+static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
 
 static struct clk pll1_clk = {
        .name = "PLL1",
index 94c950d..2f316f0 100644 (file)
@@ -21,9 +21,6 @@
 #include <mach/hardware.h>
 #include <mach/csp/mm_io.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =(MM_IO_BASE_INTC0)
                ldr     \irqstat, [\base, #0]           @ get status
@@ -77,6 +74,3 @@
 
                .macro  get_irqnr_preamble, base, tmp
                .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
deleted file mode 100644 (file)
index cb78250..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index ab1711b..8736c1a 100644 (file)
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd)
 {
        soft_restart(0);
 }
+
+static void clps711x_idle(void)
+{
+       clps_writel(1, HALT);
+       __asm__ __volatile__(
+       "mov    r0, r0\n\
+       mov     r0, r0");
+}
+
+static int __init clps711x_idle_init(void)
+{
+       arm_pm_idle = clps711x_idle;
+       return 0;
+}
+
+arch_initcall(clps711x_idle_init);
index 90fa2f7..125af59 100644 (file)
 #include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
 #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
 #error INTSR stride != INTMR stride
 #endif
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
deleted file mode 100644 (file)
index 23d6ef8..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/system.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/clps7111.h>
-
-static inline void arch_idle(void)
-{
-       clps_writel(1, HALT);
-       __asm__ __volatile__(
-       "mov    r0, r0\n\
-       mov     r0, r0");
-}
-
-#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 01c57df..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Low-level IRQ helper macros for Cavium Networks platforms
- *
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
deleted file mode 100644 (file)
index 9e56b7d..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * Copyright 2000 Deep Blue Solutions Ltd
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <asm/proc-fns.h>
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index e14c0dc..c1661d2 100644 (file)
 #include <mach/io.h>
 #include <mach/irqs.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                ldr \base, =davinci_intc_base
                ldr \base, [\base]
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
                ldr \tmp, =davinci_intc_type
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
deleted file mode 100644 (file)
index fcb7a01..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * DaVinci system defines
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/common.h>
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
index e84c78c..72d622b 100644 (file)
 
 #include <mach/bridge-regs.h>
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =IRQ_VIRT_BASE
        .endm
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
deleted file mode 100644 (file)
index 3027954..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index 294aad0..804c912 100644 (file)
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = {
        &am79c961_device,
 };
 
+/*
+ * EBSA110 idling methodology:
+ *
+ * We can not execute the "wait for interrupt" instruction since that
+ * will stop our MCLK signal (which provides the clock for the glue
+ * logic, and therefore the timer interrupt).
+ *
+ * Instead, we spin, polling the IRQ_STAT register for the occurrence
+ * of any interrupt with core clock down to the memory clock.
+ */
+static void ebsa110_idle(void)
+{
+       const char *irq_stat = (char *)0xff000000;
+
+       /* disable clock switching */
+       asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
+
+       /* wait for an interrupt to occur */
+       while (!*irq_stat);
+
+       /* enable clock switching */
+       asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
+}
+
 static int __init ebsa110_init(void)
 {
+       arm_pm_idle = ebsa110_idle;
        return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
 }
 
index cc3e599..14b110d 100644 (file)
 
 #define IRQ_STAT               0xff000000      /* read */
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        mov     \base, #IRQ_STAT
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, stat, base, tmp
        ldrb    \stat, [\base]                  @ get interrupts
        mov     \irqnr, #0
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
deleted file mode 100644 (file)
index 2e4af65..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/system.h
- *
- *  Copyright (C) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-/*
- * EBSA110 idling methodology:
- *
- * We can not execute the "wait for interrupt" instruction since that
- * will stop our MCLK signal (which provides the clock for the glue
- * logic, and therefore the timer interrupt).
- *
- * Instead, we spin, polling the IRQ_STAT register for the occurrence
- * of any interrupt with core clock down to the memory clock.
- */
-static inline void arch_idle(void)
-{
-       const char *irq_stat = (char *)0xff000000;
-
-       /* disable clock switching */
-       asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
-
-       /* wait for an interrupt to occur */
-       while (!*irq_stat);
-
-       /* enable clock switching */
-       asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
-}
-
-#endif
index 24203f9..903edb0 100644 (file)
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
        .set_mctrl      = ep93xx_uart_set_mctrl,
 };
 
-static struct amba_device uart1_device = {
-       .dev            = {
-               .init_name      = "apb:uart1",
-               .platform_data  = &ep93xx_uart_data,
-       },
-       .res            = {
-               .start  = EP93XX_UART1_PHYS_BASE,
-               .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
-       .periphid       = 0x00041010,
-};
-
-static struct amba_device uart2_device = {
-       .dev            = {
-               .init_name      = "apb:uart2",
-               .platform_data  = &ep93xx_uart_data,
-       },
-       .res            = {
-               .start  = EP93XX_UART2_PHYS_BASE,
-               .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
-       .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
+       { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
 
-static struct amba_device uart3_device = {
-       .dev            = {
-               .init_name      = "apb:uart3",
-               .platform_data  = &ep93xx_uart_data,
-       },
-       .res            = {
-               .start  = EP93XX_UART3_PHYS_BASE,
-               .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
-       .periphid       = 0x00041010,
-};
+static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
+       { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
 
+static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
+       { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
 
 static struct resource ep93xx_rtc_resource[] = {
        {
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 9be6edc..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/entry-macro.S
- * IRQ demultiplexing for EP93xx
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
deleted file mode 100644 (file)
index b5bec7c..0000000
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/system.h
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index c59e188..031c1e5 100644 (file)
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
        },
 };
 
-static void exynos_idle(void)
-{
-       if (!need_resched())
-               cpu_do_idle();
-
-       local_irq_enable();
-}
-
 void exynos4_restart(char mode, const char *cmd)
 {
        __raw_writel(0x1, S5P_SWRESET);
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init);
 int __init exynos_init(void)
 {
        printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-       /* set idle function */
-       pm_idle = exynos_idle;
-
        return device_register(&exynos4_dev);
 }
 
index b10fcd2..91370de 100644 (file)
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
        .peri_id = pdma0_peri,
 };
 
-struct amba_device exynos4_device_pdma0 = {
-       .dev = {
-               .init_name = "dma-pl330.0",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &exynos4_pdma0_pdata,
-       },
-       .res = {
-               .start = EXYNOS4_PA_PDMA0,
-               .end = EXYNOS4_PA_PDMA0 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA0, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0,
+       {IRQ_PDMA0}, &exynos4_pdma0_pdata);
 
 u8 pdma1_peri[] = {
        DMACH_PCM0_RX,
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
        .peri_id = pdma1_peri,
 };
 
-struct amba_device exynos4_device_pdma1 = {
-       .dev = {
-               .init_name = "dma-pl330.1",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &exynos4_pdma1_pdata,
-       },
-       .res = {
-               .start = EXYNOS4_PA_PDMA1,
-               .end = EXYNOS4_PA_PDMA1 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA1, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1,
+       {IRQ_PDMA1}, &exynos4_pdma1_pdata);
 
 static int __init exynos4_dma_init(void)
 {
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
 
        dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
-       amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+       amba_device_register(&exynos4_pdma0_device, &iomem_resource);
 
        dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
-       amba_device_register(&exynos4_device_pdma1, &iomem_resource);
+       amba_device_register(&exynos4_pdma1_device, &iomem_resource);
 
        return 0;
 }
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 3ba4f54..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/* arch/arm/mach-exynos4/include/mach/entry-macro.S
- *
- * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for EXYNOS4 platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
deleted file mode 100644 (file)
index 0063a6d..0000000
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/system.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com
- *
- * EXYNOS4 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-       /* nothing here yet */
-}
-#endif /* __ASM_ARCH_SYSTEM_H */
index d3847be..dabbd5c 100644 (file)
@@ -14,9 +14,6 @@
                .equ    dc21285_high, ARMCSR_BASE & 0xff000000
                .equ    dc21285_low, ARMCSR_BASE & 0x00ffffff
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                mov     \base, #dc21285_high
                .if     dc21285_low
@@ -24,9 +21,6 @@
                .endif
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqstat, [\base, #0x180]       @ get interrupts
 
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
deleted file mode 100644 (file)
index a174a58..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-footbridge/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index c5b24b9..7355c0b 100644 (file)
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                  := irq.o mm.o time.o devices.o gpio.o
+obj-y                  := irq.o mm.o time.o devices.o gpio.o idle.o
 
 # Board-specific support
 obj-$(CONFIG_MACH_NAS4220B)    += board-nas4220b.o
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c
new file mode 100644 (file)
index 0000000..92bbd6b
--- /dev/null
@@ -0,0 +1,29 @@
+/*
+ * arch/arm/mach-gemini/idle.c
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/proc-fns.h>
+
+static void gemini_idle(void)
+{
+       /*
+        * Because of broken hardware we have to enable interrupts or the CPU
+        * will never wakeup... Acctualy it is not very good to enable
+        * interrupts first since scheduler can miss a tick, but there is
+        * no other way around this. Platforms that needs it for power saving
+        * should call enable_hlt() in init code, since by default it is
+        * disabled.
+        */
+       local_irq_enable();
+       cpu_do_idle();
+}
+
+static int __init gemini_idle_init(void)
+{
+       arm_pm_idle = gemini_idle;
+       return 0;
+}
+
+arch_initcall(gemini_idle_init);
index 1624f91..f044e43 100644 (file)
 
 #define IRQ_STATUS     0x14
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr     \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
        ldr     \irqnr, [\irqstat]
index 4d9c1f8..a33b5a1 100644 (file)
 #include <mach/hardware.h>
 #include <mach/global_reg.h>
 
-static inline void arch_idle(void)
-{
-       /*
-        * Because of broken hardware we have to enable interrupts or the CPU
-        * will never wakeup... Acctualy it is not very good to enable
-        * interrupts here since scheduler can miss a tick, but there is
-        * no other way around this. Platforms that needs it for power saving
-        * should call enable_hlt() in init code, since by default it is
-        * disabled.
-        */
-       local_irq_enable();
-       cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
        __raw_writel(RESET_GLOBAL | RESET_CPU1,
index 9485a8f..ca70e5f 100644 (file)
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void)
        unsigned int i, mode = 0, level = 0;
 
        /*
-        * Disable arch_idle() by default since it is buggy
-        * For more info see arch/arm/mach-gemini/include/mach/system.h
+        * Disable the idle handler by default since it is buggy
+        * For more info see arch/arm/mach-gemini/idle.c
         */
        disable_hlt();
 
index f8a2f6b..e756d1a 100644 (file)
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd)
 {
        CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
 }
+
+static void h720x__idle(void)
+{
+       CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
+       nop();
+       nop();
+       CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
+       nop();
+       nop();
+}
+
+static int __init h720x_idle_init(void)
+{
+       arm_pm_idle = h720x__idle;
+       return 0;
+}
+
+arch_initcall(h720x_idle_init);
index c3948e5..75267fa 100644 (file)
@@ -8,15 +8,9 @@
  * warranty of any kind, whether express or implied.
  */
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
                @ we could use the id register on H7202, but this is not
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
deleted file mode 100644 (file)
index 16ac46e..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/system.h
- *
- * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- * arch/arm/mach-h720x/include/mach/system.h
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <mach/hardware.h>
-
-static void arch_idle(void)
-{
-       CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
-       nop();
-       nop();
-       CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
-       nop();
-       nop();
-}
-
-#endif
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
deleted file mode 100644 (file)
index a14f9e6..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
deleted file mode 100644 (file)
index b1d8b5f..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright 2010-2011 Calxeda, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index 31807d2..8404ee7 100644 (file)
@@ -34,31 +34,29 @@ static void imx3_idle(void)
 {
        unsigned long reg = 0;
 
-       if (!need_resched())
-               __asm__ __volatile__(
-                       /* disable I and D cache */
-                       "mrc p15, 0, %0, c1, c0, 0\n"
-                       "bic %0, %0, #0x00001000\n"
-                       "bic %0, %0, #0x00000004\n"
-                       "mcr p15, 0, %0, c1, c0, 0\n"
-                       /* invalidate I cache */
-                       "mov %0, #0\n"
-                       "mcr p15, 0, %0, c7, c5, 0\n"
-                       /* clear and invalidate D cache */
-                       "mov %0, #0\n"
-                       "mcr p15, 0, %0, c7, c14, 0\n"
-                       /* WFI */
-                       "mov %0, #0\n"
-                       "mcr p15, 0, %0, c7, c0, 4\n"
-                       "nop\n" "nop\n" "nop\n" "nop\n"
-                       "nop\n" "nop\n" "nop\n"
-                       /* enable I and D cache */
-                       "mrc p15, 0, %0, c1, c0, 0\n"
-                       "orr %0, %0, #0x00001000\n"
-                       "orr %0, %0, #0x00000004\n"
-                       "mcr p15, 0, %0, c1, c0, 0\n"
-                       : "=r" (reg));
-       local_irq_enable();
+       __asm__ __volatile__(
+               /* disable I and D cache */
+               "mrc p15, 0, %0, c1, c0, 0\n"
+               "bic %0, %0, #0x00001000\n"
+               "bic %0, %0, #0x00000004\n"
+               "mcr p15, 0, %0, c1, c0, 0\n"
+               /* invalidate I cache */
+               "mov %0, #0\n"
+               "mcr p15, 0, %0, c7, c5, 0\n"
+               /* clear and invalidate D cache */
+               "mov %0, #0\n"
+               "mcr p15, 0, %0, c7, c14, 0\n"
+               /* WFI */
+               "mov %0, #0\n"
+               "mcr p15, 0, %0, c7, c0, 4\n"
+               "nop\n" "nop\n" "nop\n" "nop\n"
+               "nop\n" "nop\n" "nop\n"
+               /* enable I and D cache */
+               "mrc p15, 0, %0, c1, c0, 0\n"
+               "orr %0, %0, #0x00001000\n"
+               "orr %0, %0, #0x00000004\n"
+               "mcr p15, 0, %0, c1, c0, 0\n"
+               : "=r" (reg));
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -134,8 +132,8 @@ void __init imx31_init_early(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX31);
        mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-       pm_idle = imx3_idle;
        imx_ioremap = imx3_ioremap;
+       arm_pm_idle = imx3_idle;
 }
 
 void __init mx31_init_irq(void)
@@ -197,7 +195,7 @@ void __init imx35_init_early(void)
        mxc_set_cpu_type(MXC_CPU_MX35);
        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-       pm_idle = imx3_idle;
+       arm_pm_idle = imx3_idle;
        imx_ioremap = imx3_ioremap;
 }
 
index bc17dfe..49549a7 100644 (file)
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
 
 static void imx5_idle(void)
 {
-       if (!need_resched()) {
-               /* gpc clock is needed for SRPG */
-               if (gpc_dvfs_clk == NULL) {
-                       gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
-                       if (IS_ERR(gpc_dvfs_clk))
-                               goto err0;
-               }
-               clk_enable(gpc_dvfs_clk);
-               mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
-               if (tzic_enable_wake())
-                       goto err1;
-               cpu_do_idle();
-err1:
-               clk_disable(gpc_dvfs_clk);
+       /* gpc clock is needed for SRPG */
+       if (gpc_dvfs_clk == NULL) {
+               gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
+               if (IS_ERR(gpc_dvfs_clk))
+                       return;
        }
-err0:
-       local_irq_enable();
+       clk_enable(gpc_dvfs_clk);
+       mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+       if (tzic_enable_wake() != 0)
+               cpu_do_idle();
+       clk_disable(gpc_dvfs_clk);
 }
 
 /*
@@ -108,7 +102,7 @@ void __init imx51_init_early(void)
        mxc_set_cpu_type(MXC_CPU_MX51);
        mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-       pm_idle = imx5_idle;
+       arm_pm_idle = imx5_idle;
 }
 
 void __init imx53_init_early(void)
index e455d2f..6fcffa7 100644 (file)
@@ -10,7 +10,6 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 #include <mach/hardware.h>
 
 static int mx27_suspend_enter(suspend_state_t state)
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
                cscr &= 0xFFFFFFFC;
                __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
                /* Executes WFI */
-               arch_idle();
+               cpu_do_idle();
                break;
 
        default:
index 019f0ab..15b87f2 100644 (file)
 
 static struct amba_pl010_data integrator_uart_data;
 
-static struct amba_device rtc_device = {
-       .dev            = {
-               .init_name = "mb:15",
-       },
-       .res            = {
-               .start  = INTEGRATOR_RTC_BASE,
-               .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_RTCINT, NO_IRQ },
-};
+#define INTEGRATOR_RTC_IRQ     { IRQ_RTCINT }
+#define INTEGRATOR_UART0_IRQ   { IRQ_UARTINT0 }
+#define INTEGRATOR_UART1_IRQ   { IRQ_UARTINT1 }
+#define KMI0_IRQ               { IRQ_KMIINT0 }
+#define KMI1_IRQ               { IRQ_KMIINT1 }
 
-static struct amba_device uart0_device = {
-       .dev            = {
-               .init_name = "mb:16",
-               .platform_data = &integrator_uart_data,
-       },
-       .res            = {
-               .start  = INTEGRATOR_UART0_BASE,
-               .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_UARTINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(rtc, "mb:15", 0,
+       INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 
-static struct amba_device uart1_device = {
-       .dev            = {
-               .init_name = "mb:17",
-               .platform_data = &integrator_uart_data,
-       },
-       .res            = {
-               .start  = INTEGRATOR_UART1_BASE,
-               .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_UARTINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart0, "mb:16", 0,
+       INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi0_device = {
-       .dev            = {
-               .init_name = "mb:18",
-       },
-       .res            = {
-               .start  = KMI0_BASE,
-               .end    = KMI0_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_KMIINT0, NO_IRQ },
-};
+static AMBA_APB_DEVICE(uart1, "mb:17", 0,
+       INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
 
-static struct amba_device kmi1_device = {
-       .dev            = {
-               .init_name = "mb:19",
-       },
-       .res            = {
-               .start  = KMI1_BASE,
-               .end    = KMI1_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_KMIINT1, NO_IRQ },
-};
+static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL);
+static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
        &rtc_device,
index 8cbb75a..3e538da 100644 (file)
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
 
                pc_base = dev->resource.start + idev->offset;
 
-               d = kzalloc(sizeof(struct amba_device), GFP_KERNEL);
+               d = amba_device_alloc(NULL, pc_base, SZ_4K);
                if (!d)
                        continue;
 
                dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12);
                d->dev.parent   = &dev->dev;
-               d->res.start    = dev->resource.start + idev->offset;
-               d->res.end      = d->res.start + SZ_4K - 1;
-               d->res.flags    = IORESOURCE_MEM;
                d->irq[0]       = dev->irq;
                d->irq[1]       = dev->irq;
                d->periphid     = idev->id;
                d->dev.platform_data = idev->platform_data;
 
-               ret = amba_device_register(d, &dev->resource);
+               ret = amba_device_add(d, &dev->resource);
                if (ret) {
                        dev_err(&d->dev, "unable to register device: %d\n", ret);
-                       kfree(d);
+                       amba_device_put(d);
                }
        }
 
index 3d029c9..5cc7b85 100644 (file)
 #include <mach/platform.h>
 #include <mach/irqs.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 /* FIXME: should not be using soo many LDRs here */
                ldr     \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
deleted file mode 100644 (file)
index 901514e..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/system.h
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index a8b6aa6..be9ead4 100644 (file)
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
        .gpio_cd        = -1,
 };
 
-static struct amba_device mmc_device = {
-       .dev            = {
-               .init_name = "mb:1c",
-               .platform_data = &mmc_data,
-       },
-       .res            = {
-               .start  = INTEGRATOR_CP_MMC_BASE,
-               .end    = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
-       .periphid       = 0,
-};
+#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
+#define INTEGRATOR_CP_AACI_IRQS        { IRQ_CP_AACIINT }
 
-static struct amba_device aaci_device = {
-       .dev            = {
-               .init_name = "mb:1d",
-       },
-       .res            = {
-               .start  = INTEGRATOR_CP_AACI_BASE,
-               .end    = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { IRQ_CP_AACIINT, NO_IRQ },
-       .periphid       = 0,
-};
+static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE,
+       INTEGRATOR_CP_MMC_IRQS, &mmc_data);
+
+static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
+       INTEGRATOR_CP_AACI_IRQS, NULL);
 
 
 /*
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
        .remove         = versatile_clcd_remove_dma,
 };
 
-static struct amba_device clcd_device = {
-       .dev            = {
-               .init_name = "mb:c0",
-               .coherent_dma_mask = ~0,
-               .platform_data = &clcd_data,
-       },
-       .res            = {
-               .start  = INTCP_PA_CLCD_BASE,
-               .end    = INTCP_PA_CLCD_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .dma_mask       = ~0,
-       .irq            = { IRQ_CP_CLCDCINT, NO_IRQ },
-       .periphid       = 0,
-};
+static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE,
+       { IRQ_CP_CLCDCINT }, &clcd_data);
 
 static struct amba_device *amba_devs[] __initdata = {
        &mmc_device,
index a624a78..1a2d603 100644 (file)
@@ -16,9 +16,6 @@
  * Place - Suite 330, Boston, MA 02111-1307 USA.
  *
  */
-       .macro  disable_fiq
-       .endm
-
        .macro get_irqnr_preamble, base, tmp
        mrc     p15, 0, \tmp, c15, c1, 0
        orr     \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
deleted file mode 100644 (file)
index 1f31ed3..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop13xx/include/mach/system.h
- *
- *  Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index b02fb56..ea13ae0 100644 (file)
@@ -9,9 +9,6 @@
  */
 #include <mach/iop32x.h>
 
-       .macro  disable_fiq
-       .endm
-
        .macro get_irqnr_preamble, base, tmp
        mrc     p15, 0, \tmp, c15, c1, 0
        orr     \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
deleted file mode 100644 (file)
index 4a88727..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index 4e1f728..0a398fe 100644 (file)
@@ -9,9 +9,6 @@
  */
 #include <mach/iop33x.h>
 
-       .macro  disable_fiq
-       .endm
-
        .macro get_irqnr_preamble, base, tmp
        mrc     p15, 0, \tmp, c15, c1, 0
        orr     \tmp, \tmp, #(1 << 6)
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
deleted file mode 100644 (file)
index 4f98e76..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index 5850ffc..c4444df 100644 (file)
@@ -9,15 +9,9 @@
  */
 #include <mach/irqs.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
                mov     \irqnr, #0x0              @clear out irqnr as default
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
deleted file mode 100644 (file)
index a7fb08b..0000000
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corp.
- * Copyricht (C) 2003-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index 0923bb9..7c1495e 100644 (file)
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = {
 
 void __init ixp23xx_sys_init(void)
 {
+       /* by default, the idle code is disabled */
+       disable_hlt();
+
        *IXP23XX_EXP_UNIT_FUSE |= 0xf;
        platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
 }
index 3f5338a..3fd2cb9 100644 (file)
@@ -2,15 +2,9 @@
  * arch/arm/mach-ixp23xx/include/mach/entry-macro.S
  */
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
                ldr     \irqnr, [\irqnr]        @ get interrupt number
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
deleted file mode 100644 (file)
index 277dda7..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/system.h
- *
- * Copyright (C) 2003 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-#if 0
-       if (!hlt_counter)
-               cpu_do_idle();
-#endif
-}
index 3841ab4..a6329a0 100644 (file)
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void)
 {
        int i = 0;
 
+       /*
+        * ixp4xx does not implement the XScale PWRMODE register
+        * so it must not call cpu_do_idle().
+        */
+       disable_hlt();
+
        /* Route all sources to IRQ instead of FIQ */
        *IXP4XX_ICLR = 0x0;
 
index f2e14e9..79adf83 100644 (file)
@@ -9,15 +9,9 @@
  */
 #include <mach/hardware.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
                ldr     \irqstat, [\irqstat]            @ get interrupts
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
deleted file mode 100644 (file)
index 140a9be..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/system.h
- *
- * Copyright (C) 2002 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-static inline void arch_idle(void)
-{
-       /* ixp4xx does not implement the XScale PWRMODE register,
-        * so it must not call cpu_do_idle() here.
-        */
-#if 0
-       cpu_do_idle();
-#endif
-}
index 8939d36..82db29f 100644 (file)
 
 #include <mach/bridge-regs.h>
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =IRQ_VIRT_BASE
        .endm
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
deleted file mode 100644 (file)
index 5fddde0..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index b4fe0c1..8315b34 100644 (file)
 #include <mach/hardware.h>
 #include <mach/regs-irq.h>
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
                ldr     \base, =KS8695_IRQ_VA                   @ Base address of interrupt controller
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqstat, [\base, #KS8695_INTMS]        @ Mask Status register
 
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
deleted file mode 100644 (file)
index 59fe992..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (C) 2006 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * KS8695 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks,
-        */
-       cpu_do_idle();
-
-}
-
-#endif
index b725f6c..24ca11b 100644 (file)
 
 #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
 /*
  * Return IRQ number in irqnr. Also return processor Z flag status in CPSR
  * as set if an interrupt is pending.
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
deleted file mode 100644 (file)
index bf176c9..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/system.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index bfee5b4..5d51c10 100644 (file)
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
        .remove         = lpc32xx_clcd_remove,
 };
 
-static struct amba_device lpc32xx_clcd_device = {
-       .dev                            = {
-               .coherent_dma_mask      = ~0,
-               .init_name              = "dev:clcd",
-               .platform_data          = &lpc32xx_clcd_data,
-       },
-       .res                            = {
-               .start                  = LPC32XX_LCD_BASE,
-               .end                    = (LPC32XX_LCD_BASE + SZ_4K - 1),
-               .flags                  = IORESOURCE_MEM,
-       },
-       .dma_mask                       = ~0,
-       .irq                            = {IRQ_LPC32XX_LCD, NO_IRQ},
-};
+static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0,
+       LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data);
 
 /*
  * AMBA SSP (SPI)
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
        .enable_dma             = 0,
 };
 
-static struct amba_device lpc32xx_ssp0_device = {
-       .dev                            = {
-               .coherent_dma_mask      = ~0,
-               .init_name              = "dev:ssp0",
-               .platform_data          = &lpc32xx_ssp0_data,
-       },
-       .res                            = {
-               .start                  = LPC32XX_SSP0_BASE,
-               .end                    = (LPC32XX_SSP0_BASE + SZ_4K - 1),
-               .flags                  = IORESOURCE_MEM,
-       },
-       .dma_mask                       = ~0,
-       .irq                            = {IRQ_LPC32XX_SSP0, NO_IRQ},
-};
+static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0,
+       LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data);
 
 /* AT25 driver registration */
 static int __init phy3250_spi_board_register(void)
index c42d9d4..9cff9e7 100644 (file)
@@ -8,12 +8,6 @@
 
 #include <mach/regs-icu.h>
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
        and     \tmp, \tmp, #0xff00
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
deleted file mode 100644 (file)
index 1d001ea..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/system.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_SYSTEM_H
-#define __ASM_MACH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
deleted file mode 100644 (file)
index 6a94f05..0000000
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/idle.S
- *
- * Idle processing for MSM7K - work around bugs with SWFI.
- *
- * Copyright (c) 2007 QUALCOMM Incorporated.
- * Copyright (C) 2007 Google, Inc. 
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */ 
-               
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-ENTRY(arch_idle)
-#ifdef CONFIG_MSM7X00A_IDLE
-       mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */
-       bic     r0, r1, #(1 << 2)        /* clear dcache bit   */
-       bic     r0, r0, #(1 << 12)       /* clear icache bit   */
-       mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */
-
-       mov     r0, #0                   /* prepare wfi value  */
-       mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */
-       mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */
-       mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */
-
-       mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */
-#endif
-       mov     pc, lr
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c
new file mode 100644 (file)
index 0000000..0c9e13c
--- /dev/null
@@ -0,0 +1,49 @@
+/* arch/arm/mach-msm/idle.c
+ *
+ * Idle processing for MSM7K - work around bugs with SWFI.
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated.
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <asm/system.h>
+
+static void msm_idle(void)
+{
+#ifdef CONFIG_MSM7X00A_IDLE
+       asm volatile (
+
+       "mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */ \n\t"
+       "bic     r0, r1, #(1 << 2)        /* clear dcache bit   */ \n\t"
+       "bic     r0, r0, #(1 << 12)       /* clear icache bit   */ \n\t"
+       "mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */ \n\t"
+
+       "mov     r0, #0                   /* prepare wfi value  */ \n\t"
+       "mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */ \n\t"
+       "mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */ \n\t"
+       "mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */ \n\t"
+
+       "mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */ \n\t"
+
+       : : : "r0","r1" );
+#endif
+}
+
+static int __init msm_idle_init(void)
+{
+       arm_pm_idle = msm_idle;
+       return 0;
+}
+
+arch_initcall(msm_idle_init);
index 41f7003..f2ae908 100644 (file)
  *
  */
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
 #if !defined(CONFIG_ARM_GIC)
 #include <mach/msm_iomap.h>
 
index 311db2b..f5fb2ec 100644 (file)
@@ -12,7 +12,6 @@
  * GNU General Public License for more details.
  *
  */
-void arch_idle(void);
 
 /* low level hardware reset hook -- for example, hitting the
  * PSHOLD line on the PMIC to hard reset the system
index 66ae2d2..6b1f088 100644 (file)
 
 #include <mach/bridge-regs.h>
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =IRQ_VIRT_BASE
        .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
deleted file mode 100644 (file)
index 8c3a538..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/system.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index fe3e847..01faffe 100644 (file)
@@ -77,16 +77,18 @@ err:
 
 int __init mxs_add_amba_device(const struct amba_device *dev)
 {
-       struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL);
+       struct amba_device *adev = amba_device_alloc(dev->dev.init_name,
+               dev->res.start, resource_size(&dev->res));
 
        if (!adev) {
                pr_err("%s: failed to allocate memory", __func__);
                return -ENOMEM;
        }
 
-       *adev = *dev;
+       adev->irq[0] = dev->irq[0];
+       adev->irq[1] = dev->irq[1];
 
-       return amba_device_register(adev, &iomem_resource);
+       return amba_device_add(adev, &iomem_resource);
 }
 
 struct device mxs_apbh_bus = {
index a559db0..a5479f7 100644 (file)
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = {                \
                .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1,   \
                .flags = IORESOURCE_MEM,                        \
        },                                                      \
-       .irq = {soc ## _INT_DUART, NO_IRQ},                     \
+       .irq = {soc ## _INT_DUART},                             \
 }
 
 #ifdef CONFIG_SOC_IMX23
index 9f0da12..0c14259 100644 (file)
@@ -23,9 +23,6 @@
 #define MXS_ICOLL_VBASE                MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR)
 #define HW_ICOLL_STAT_OFFSET   0x70
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        ldr     \irqnr, [\base, #HW_ICOLL_STAT_OFFSET]
        cmp     \irqnr, #0x7F
@@ -36,6 +33,3 @@
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =MXS_ICOLL_VBASE
        .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
deleted file mode 100644 (file)
index e7ad1bb..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *  Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_MXS_SYSTEM_H__
-#define __MACH_MXS_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif /* __MACH_MXS_SYSTEM_H__ */
index fb042da..a9b4bbc 100644 (file)
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/system.h>
 
 static int mxs_suspend_enter(suspend_state_t state)
 {
        switch (state) {
        case PM_SUSPEND_MEM:
-               arch_idle();
+               cpu_do_idle();
                break;
 
        default:
index b991323..2cdf6ef 100644 (file)
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
 {
 }
 
-static struct amba_device fb_device = {
-       .dev            = {
-               .init_name = "fb",
-               .coherent_dma_mask = ~0,
-       },
-       .res            = {
-               .start  = 0x00104000,
-               .end    = 0x00104fff,
-               .flags  = IORESOURCE_MEM,
-       },
-       .irq            = { NETX_IRQ_LCD, NO_IRQ },
-};
+static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL);
 
 int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
 {
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 6e9f1cb..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/mach-netx/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for Hilscher netX based platforms
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
deleted file mode 100644 (file)
index b38fa36..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-netx/include/mach/system.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
-
index b77cb84..58cacaf 100644 (file)
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
 #endif
 }
 
-#define __MEM_4K_RESOURCE(x) \
-       .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
+static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE,
+       { IRQ_UART0 }, NULL);
 
-static struct amba_device uart0_device = {
-       .dev = { .init_name = "uart0" },
-       __MEM_4K_RESOURCE(NOMADIK_UART0_BASE),
-       .irq = {IRQ_UART0, NO_IRQ},
-};
-
-static struct amba_device uart1_device = {
-       .dev = { .init_name = "uart1" },
-       __MEM_4K_RESOURCE(NOMADIK_UART1_BASE),
-       .irq = {IRQ_UART1, NO_IRQ},
-};
+static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE,
+       { IRQ_UART1 }, NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
        &uart0_device,
index 65df7b4..27f43a4 100644 (file)
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
        GPIO_DEVICE(3),
 };
 
-static struct amba_device cpu8815_amba_rng = {
-       .dev = {
-               .init_name = "rng",
-       },
-       __MEM_4K_RESOURCE(NOMADIK_RNG_BASE),
-};
+static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL);
 
 static struct platform_device *platform_devs[] __initdata = {
        cpu8815_platform_gpio + 0,
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
 };
 
 static struct amba_device *amba_devs[] __initdata = {
-       &cpu8815_amba_rng
+       &cpu8815_amba_rng_device
 };
 
 static int __init cpu8815_init(void)
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 98ea1c1..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * Low-level IRQ helper macros for Nomadik platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
deleted file mode 100644 (file)
index 25e198b..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- *  mach-nomadik/include/mach/system.h
- *
- *  Copyright (C) 2008 STMicroelectronics
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index bfb4fb1..83c0250 100644 (file)
 #include <mach/irqs.h>
 #include <asm/hardware/gic.h>
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
                ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h
deleted file mode 100644 (file)
index a6c1b3a..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/system.h
- */
-
-#include <plat/system.h>
index 89ea20c..0c2c366 100644 (file)
@@ -42,9 +42,9 @@
 #include <linux/sysfs.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/atomic.h>
 
 #include <asm/irq.h>
-#include <linux/atomic.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
@@ -108,13 +108,7 @@ void omap1_pm_idle(void)
        __u32 use_idlect1 = arm_idlect1_mask;
        int do_sleep = 0;
 
-       local_irq_disable();
        local_fiq_disable();
-       if (need_resched()) {
-               local_fiq_enable();
-               local_irq_enable();
-               return;
-       }
 
 #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)
 #warning Enable 32kHz OS timer in order to allow sleep states in idle
@@ -157,14 +151,12 @@ void omap1_pm_idle(void)
                omap_writel(saved_idlect1, ARM_IDLECT1);
 
                local_fiq_enable();
-               local_irq_enable();
                return;
        }
        omap_sram_suspend(omap_readl(ARM_IDLECT1),
                          omap_readl(ARM_IDLECT2));
 
        local_fiq_enable();
-       local_irq_enable();
 }
 
 /*
@@ -583,8 +575,6 @@ static void omap_pm_init_proc(void)
 
 #endif /* DEBUG && CONFIG_PROC_FS */
 
-static void (*saved_idle)(void) = NULL;
-
 /*
  *     omap_pm_prepare - Do preliminary suspend work.
  *
@@ -592,8 +582,7 @@ static void (*saved_idle)(void) = NULL;
 static int omap_pm_prepare(void)
 {
        /* We cannot sleep in idle until we have resumed */
-       saved_idle = pm_idle;
-       pm_idle = NULL;
+       disable_hlt();
 
        return 0;
 }
@@ -630,7 +619,7 @@ static int omap_pm_enter(suspend_state_t state)
 
 static void omap_pm_finish(void)
 {
-       pm_idle = saved_idle;
+       enable_hlt();
 }
 
 
@@ -687,7 +676,7 @@ static int __init omap_pm_init(void)
                return -ENODEV;
        }
 
-       pm_idle = omap1_pm_idle;
+       arm_pm_idle = omap1_pm_idle;
 
        if (cpu_is_omap7xx())
                setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq);
index 9c442e2..ce91aad 100644 (file)
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin");
 #define ETB_BASE       (L4_EMU_34XX_PHYS + 0x1b000)
 #define DAPCTL         (L4_EMU_34XX_PHYS + 0x1d000)
 
-static struct amba_device omap3_etb_device = {
-       .dev            = {
-               .init_name = "etb",
-       },
-       .res            = {
-               .start  = ETB_BASE,
-               .end    = ETB_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .periphid       = 0x000bb907,
-};
-
-static struct amba_device omap3_etm_device = {
-       .dev            = {
-               .init_name = "etm",
-       },
-       .res            = {
-               .start  = ETM_BASE,
-               .end    = ETM_BASE + SZ_4K - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       .periphid       = 0x102bb921,
-};
+static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL);
+static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL);
 
 static int __init emu_init(void)
 {
@@ -66,4 +45,3 @@ static int __init emu_init(void)
 }
 
 subsys_initcall(emu_init);
-
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 56964a0..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for OMAP-based platforms
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h
deleted file mode 100644 (file)
index d488721..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/system.h
- */
-
-#include <plat/system.h>
index 23de98d..a4eb5c2 100644 (file)
@@ -226,7 +226,6 @@ static int omap2_can_sleep(void)
 
 static void omap2_pm_idle(void)
 {
-       local_irq_disable();
        local_fiq_disable();
 
        if (!omap2_can_sleep()) {
@@ -243,7 +242,6 @@ static void omap2_pm_idle(void)
 
 out:
        local_fiq_enable();
-       local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -462,7 +460,7 @@ static int __init omap2_pm_init(void)
        }
 
        suspend_set_ops(&omap_pm_ops);
-       pm_idle = omap2_pm_idle;
+       arm_pm_idle = omap2_pm_idle;
 
        return 0;
 }
index fc69875..b77df73 100644 (file)
@@ -418,10 +418,9 @@ void omap_sram_idle(void)
 
 static void omap3_pm_idle(void)
 {
-       local_irq_disable();
        local_fiq_disable();
 
-       if (omap_irq_pending() || need_resched())
+       if (omap_irq_pending())
                goto out;
 
        trace_power_start(POWER_CSTATE, 1, smp_processor_id());
@@ -434,7 +433,6 @@ static void omap3_pm_idle(void)
 
 out:
        local_fiq_enable();
-       local_irq_enable();
 }
 
 #ifdef CONFIG_SUSPEND
@@ -848,7 +846,7 @@ static int __init omap3_pm_init(void)
        suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-       pm_idle = omap3_pm_idle;
+       arm_pm_idle = omap3_pm_idle;
        omap3_idle_init();
 
        /*
index c264ef7..c840689 100644 (file)
@@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
  * omap_default_idle - OMAP4 default ilde routine.'
  *
  * Implements OMAP4 memory, IO ordering requirements which can't be addressed
- * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
+ * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
  * by secondary CPU with CONFIG_CPUIDLE.
  */
 static void omap_default_idle(void)
 {
-       local_irq_disable();
        local_fiq_disable();
 
        omap_do_wfi();
 
        local_fiq_enable();
-       local_irq_enable();
 }
 
 /**
@@ -255,8 +253,8 @@ static int __init omap4_pm_init(void)
        suspend_set_ops(&omap_pm_ops);
 #endif /* CONFIG_SUSPEND */
 
-       /* Overwrite the default arch_idle() */
-       pm_idle = omap_default_idle;
+       /* Overwrite the default cpu_do_idle() */
+       arm_pm_idle = omap_default_idle;
 
        omap4_idle_init();
 
index 860118a..873b51d 100644 (file)
@@ -24,7 +24,6 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include <mach/system.h>
 #include <plat/common.h>
 #include <plat/prcm.h>
 #include <plat/irqs.h>
index d658992..79eb502 100644 (file)
 
 #include <mach/bridge-regs.h>
 
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        ldr     \base, =MAIN_IRQ_CAUSE
        .endm
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
deleted file mode 100644 (file)
index 825a265..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/system.h
- *
- * Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 9b505ac..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * entry-macro.S
- *
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * Low-level IRQ helper macros for picoXcell platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
deleted file mode 100644 (file)
index 1a5d8cb..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching and wait for interrupt
-        * tricks.
-        */
-       cpu_do_idle();
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
index db7eeeb..77a5558 100644 (file)
 #define SIC1_BASE_INT   32
 #define SIC2_BASE_INT   64
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 /* decode the MIC interrupt numbers */
                ldr     \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
deleted file mode 100644 (file)
index 60cfe71..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/system.h
- *
- * Copyright (C) 2003 Philips Semiconductors
- * Copyright (C) 2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
index 1c8a50f..86434e7 100644 (file)
        cmp \irqnr, #0x40                       @ the irq num can't be larger than 0x3f
        movges \irqnr, #0
        .endm
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
deleted file mode 100644 (file)
index 2c7d2a9..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/system.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_SYSTEM_H__
-#define __MACH_SYSTEM_H__
-
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 260c0c1..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for PXA-based platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
deleted file mode 100644 (file)
index c5afacd..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/system.h
- *
- * Author:     Nicolas Pitre
- * Created:    Jun 15, 2001
- * Copyright:  MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index 735b57a..f8f2c0a 100644 (file)
 #include <asm/setup.h>
 #include <asm/leds.h>
 
-#define AMBA_DEVICE(name,busid,base,plat)                      \
-static struct amba_device name##_device = {                    \
-       .dev            = {                                     \
-               .coherent_dma_mask = ~0,                        \
-               .init_name = busid,                             \
-               .platform_data = plat,                          \
-       },                                                      \
-       .res            = {                                     \
-               .start  = REALVIEW_##base##_BASE,               \
-               .end    = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
-               .flags  = IORESOURCE_MEM,                       \
-       },                                                      \
-       .dma_mask       = ~0,                                   \
-       .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)                    \
+static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)                    \
+static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
 
 struct machine_desc;
 
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
deleted file mode 100644 (file)
index e8a5179..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-realview/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for RealView platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
index 5c3c625..708f841 100644 (file)
@@ -40,6 +40,7 @@
 #define IRQ_DC1176_L2CC                (IRQ_DC1176_GIC_START + 13)
 #define IRQ_DC1176_RTC         (IRQ_DC1176_GIC_START + 14)
 #define IRQ_DC1176_CLCD                (IRQ_DC1176_GIC_START + 15)     /* CLCD controller */
+#define IRQ_DC1176_GPIO0       (IRQ_DC1176_GIC_START + 16)
 #define IRQ_DC1176_SSP         (IRQ_DC1176_GIC_START + 17)     /* SSP port */
 #define IRQ_DC1176_UART0       (IRQ_DC1176_GIC_START + 18)     /* UART 0 on development chip */
 #define IRQ_DC1176_UART1       (IRQ_DC1176_GIC_START + 19)     /* UART 1 on development chip */
@@ -73,7 +74,6 @@
 #define IRQ_PB1176_DMAC                (IRQ_PB1176_GIC_START + 24)     /* DMA controller */
 #define IRQ_PB1176_RTC         (IRQ_PB1176_GIC_START + 25)     /* Real Time Clock */
 
-#define IRQ_PB1176_GPIO0       -1
 #define IRQ_PB1176_SCTL                -1
 
 #define NR_GIC_PB1176          2
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
deleted file mode 100644 (file)
index 471b671..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index a2e9590..baf382c 100644 (file)
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ      { IRQ_EB_GPIO2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_EB_GPIO3, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_EB_GPIO2 }
+#define GPIO3_IRQ      { IRQ_EB_GPIO3 }
 
-#define AACI_IRQ       { IRQ_EB_AACI, NO_IRQ }
+#define AACI_IRQ       { IRQ_EB_AACI }
 #define MMCI0_IRQ      { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
-#define KMI0_IRQ       { IRQ_EB_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_EB_KMI1, NO_IRQ }
+#define KMI0_IRQ       { IRQ_EB_KMI0 }
+#define KMI1_IRQ       { IRQ_EB_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define EB_SMC_IRQ     { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define EB_CLCD_IRQ    { IRQ_EB_CLCD, NO_IRQ }
-#define DMAC_IRQ       { IRQ_EB_DMA, NO_IRQ }
+#define EB_SMC_IRQ     { }
+#define MPMC_IRQ       { }
+#define EB_CLCD_IRQ    { IRQ_EB_CLCD }
+#define DMAC_IRQ       { IRQ_EB_DMA }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define EB_WATCHDOG_IRQ        { IRQ_EB_WDOG, NO_IRQ }
-#define EB_GPIO0_IRQ   { IRQ_EB_GPIO0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_EB_GPIO1, NO_IRQ }
-#define EB_RTC_IRQ     { IRQ_EB_RTC, NO_IRQ }
+#define SCTL_IRQ       { }
+#define EB_WATCHDOG_IRQ        { IRQ_EB_WDOG }
+#define EB_GPIO0_IRQ   { IRQ_EB_GPIO0 }
+#define GPIO1_IRQ      { IRQ_EB_GPIO1 }
+#define EB_RTC_IRQ     { IRQ_EB_RTC }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ                { IRQ_EB_SCI, NO_IRQ }
-#define EB_UART0_IRQ   { IRQ_EB_UART0, NO_IRQ }
-#define EB_UART1_IRQ   { IRQ_EB_UART1, NO_IRQ }
-#define EB_UART2_IRQ   { IRQ_EB_UART2, NO_IRQ }
-#define EB_UART3_IRQ   { IRQ_EB_UART3, NO_IRQ }
-#define EB_SSP_IRQ     { IRQ_EB_SSP, NO_IRQ }
+#define SCI_IRQ                { IRQ_EB_SCI }
+#define EB_UART0_IRQ   { IRQ_EB_UART0 }
+#define EB_UART1_IRQ   { IRQ_EB_UART1 }
+#define EB_UART2_IRQ   { IRQ_EB_UART2 }
+#define EB_UART3_IRQ   { IRQ_EB_UART3 }
+#define EB_SSP_IRQ     { IRQ_EB_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
-AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
+APB_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
+APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
-AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
-AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
-AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
-AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
-AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
+AHB_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
+AHB_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
+APB_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
+APB_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
+APB_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
+APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
+APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
+APB_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
        &dmac_device,
index e4abe94..b1d7caf 100644 (file)
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 /*
  * RealView PB1176 AMBA devices
  */
-#define GPIO2_IRQ      { IRQ_PB1176_GPIO2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_PB1176_GPIO3, NO_IRQ }
-#define AACI_IRQ       { IRQ_PB1176_AACI, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_PB1176_GPIO2 }
+#define GPIO3_IRQ      { IRQ_PB1176_GPIO3 }
+#define AACI_IRQ       { IRQ_PB1176_AACI }
 #define MMCI0_IRQ      { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
-#define KMI0_IRQ       { IRQ_PB1176_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_PB1176_KMI1, NO_IRQ }
-#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define PB1176_CLCD_IRQ        { IRQ_DC1176_CLCD, NO_IRQ }
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define PB1176_WATCHDOG_IRQ    { IRQ_DC1176_WATCHDOG, NO_IRQ }
-#define PB1176_GPIO0_IRQ       { IRQ_PB1176_GPIO0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_PB1176_GPIO1, NO_IRQ }
-#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
-#define SCI_IRQ                { IRQ_PB1176_SCI, NO_IRQ }
-#define PB1176_UART0_IRQ       { IRQ_DC1176_UART0, NO_IRQ }
-#define PB1176_UART1_IRQ       { IRQ_DC1176_UART1, NO_IRQ }
-#define PB1176_UART2_IRQ       { IRQ_DC1176_UART2, NO_IRQ }
-#define PB1176_UART3_IRQ       { IRQ_DC1176_UART3, NO_IRQ }
-#define PB1176_UART4_IRQ       { IRQ_PB1176_UART4, NO_IRQ }
-#define PB1176_SSP_IRQ         { IRQ_DC1176_SSP, NO_IRQ }
+#define KMI0_IRQ       { IRQ_PB1176_KMI0 }
+#define KMI1_IRQ       { IRQ_PB1176_KMI1 }
+#define PB1176_SMC_IRQ { }
+#define MPMC_IRQ       { }
+#define PB1176_CLCD_IRQ        { IRQ_DC1176_CLCD }
+#define SCTL_IRQ       { }
+#define PB1176_WATCHDOG_IRQ    { IRQ_DC1176_WATCHDOG }
+#define PB1176_GPIO0_IRQ       { IRQ_DC1176_GPIO0 }
+#define GPIO1_IRQ      { IRQ_PB1176_GPIO1 }
+#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
+#define SCI_IRQ                { IRQ_PB1176_SCI }
+#define PB1176_UART0_IRQ       { IRQ_DC1176_UART0 }
+#define PB1176_UART1_IRQ       { IRQ_DC1176_UART1 }
+#define PB1176_UART2_IRQ       { IRQ_DC1176_UART2 }
+#define PB1176_UART3_IRQ       { IRQ_DC1176_UART3 }
+#define PB1176_UART4_IRQ       { IRQ_PB1176_UART4 }
+#define PB1176_SSP_IRQ         { IRQ_DC1176_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,      "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,      "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,      "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart4,     "fpga:uart4",   PB1176_UART4,   NULL);
+APB_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart4,      "fpga:uart4",   PB1176_UART4,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,       "dev:smc",      PB1176_SMC,     NULL);
-AMBA_DEVICE(sctl,      "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,      "dev:wdog",     PB1176_WATCHDOG,        NULL);
-AMBA_DEVICE(gpio0,     "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,     "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,     "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,       "dev:rtc",      PB1176_RTC,     NULL);
-AMBA_DEVICE(sci0,      "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,     "dev:uart0",    PB1176_UART0,   NULL);
-AMBA_DEVICE(uart1,     "dev:uart1",    PB1176_UART1,   NULL);
-AMBA_DEVICE(uart2,     "dev:uart2",    PB1176_UART2,   NULL);
-AMBA_DEVICE(uart3,     "dev:uart3",    PB1176_UART3,   NULL);
-AMBA_DEVICE(ssp0,      "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
-AMBA_DEVICE(clcd,      "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
+AHB_DEVICE(smc,                "dev:smc",      PB1176_SMC,     NULL);
+AHB_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,       "dev:wdog",     PB1176_WATCHDOG,        NULL);
+APB_DEVICE(gpio0,      "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,                "dev:rtc",      PB1176_RTC,     NULL);
+APB_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,      "dev:uart0",    PB1176_UART0,   NULL);
+APB_DEVICE(uart1,      "dev:uart1",    PB1176_UART1,   NULL);
+APB_DEVICE(uart2,      "dev:uart2",    PB1176_UART2,   NULL);
+APB_DEVICE(uart3,      "dev:uart3",    PB1176_UART3,   NULL);
+APB_DEVICE(ssp0,       "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
+AHB_DEVICE(clcd,       "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
        &uart0_device,
index 3bea5bd..a98c536 100644 (file)
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PB11MPCore AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PB11MP_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PB11MP_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_TC11MP_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PB11MP_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PB11MP_GPIO3 }
+#define AACI_IRQ               { IRQ_TC11MP_AACI }
 #define MMCI0_IRQ              { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
-#define KMI0_IRQ               { IRQ_TC11MP_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_TC11MP_KMI1, NO_IRQ }
-#define PB11MP_SMC_IRQ         { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PB11MP_CLCD_IRQ                { IRQ_PB11MP_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PB11MP_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PB11MP_WATCHDOG_IRQ    { IRQ_PB11MP_WATCHDOG, NO_IRQ }
-#define PB11MP_GPIO0_IRQ       { IRQ_PB11MP_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PB11MP_GPIO1, NO_IRQ }
-#define PB11MP_RTC_IRQ         { IRQ_TC11MP_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PB11MP_SCI, NO_IRQ }
-#define PB11MP_UART0_IRQ       { IRQ_TC11MP_UART0, NO_IRQ }
-#define PB11MP_UART1_IRQ       { IRQ_TC11MP_UART1, NO_IRQ }
-#define PB11MP_UART2_IRQ       { IRQ_PB11MP_UART2, NO_IRQ }
-#define PB11MP_UART3_IRQ       { IRQ_PB11MP_UART3, NO_IRQ }
-#define PB11MP_SSP_IRQ         { IRQ_PB11MP_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_TC11MP_KMI0 }
+#define KMI1_IRQ               { IRQ_TC11MP_KMI1 }
+#define PB11MP_SMC_IRQ         { }
+#define MPMC_IRQ               { }
+#define PB11MP_CLCD_IRQ                { IRQ_PB11MP_CLCD }
+#define DMAC_IRQ               { IRQ_PB11MP_DMAC }
+#define SCTL_IRQ               { }
+#define PB11MP_WATCHDOG_IRQ    { IRQ_PB11MP_WATCHDOG }
+#define PB11MP_GPIO0_IRQ       { IRQ_PB11MP_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PB11MP_GPIO1 }
+#define PB11MP_RTC_IRQ         { IRQ_TC11MP_RTC }
+#define SCI_IRQ                        { IRQ_PB11MP_SCI }
+#define PB11MP_UART0_IRQ       { IRQ_TC11MP_UART0 }
+#define PB11MP_UART1_IRQ       { IRQ_TC11MP_UART1 }
+#define PB11MP_UART2_IRQ       { IRQ_PB11MP_UART2 }
+#define PB11MP_UART3_IRQ       { IRQ_PB11MP_UART3 }
+#define PB11MP_SSP_IRQ         { IRQ_PB11MP_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,      "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,      "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,      "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,     "fpga:uart3",   PB11MP_UART3,   NULL);
+APB_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,       "dev:smc",      PB11MP_SMC,     NULL);
-AMBA_DEVICE(sctl,      "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,      "dev:wdog",     PB11MP_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,     "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,     "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,     "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,       "dev:rtc",      PB11MP_RTC,     NULL);
-AMBA_DEVICE(sci0,      "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,     "dev:uart0",    PB11MP_UART0,   NULL);
-AMBA_DEVICE(uart1,     "dev:uart1",    PB11MP_UART1,   NULL);
-AMBA_DEVICE(uart2,     "dev:uart2",    PB11MP_UART2,   NULL);
-AMBA_DEVICE(ssp0,      "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
+AHB_DEVICE(smc,                "dev:smc",      PB11MP_SMC,     NULL);
+AHB_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
+APB_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
+APB_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,                "dev:rtc",      PB11MP_RTC,     NULL);
+APB_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
+APB_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
+APB_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
+APB_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,      "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
-AMBA_DEVICE(dmac,      "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
+AHB_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
        &dmac_device,
index 25b2e59..5965017 100644 (file)
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBA8Core AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PBA8_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PBA8_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_PBA8_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PBA8_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PBA8_GPIO3 }
+#define AACI_IRQ               { IRQ_PBA8_AACI }
 #define MMCI0_IRQ              { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
-#define KMI0_IRQ               { IRQ_PBA8_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_PBA8_KMI1, NO_IRQ }
-#define PBA8_SMC_IRQ           { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PBA8_CLCD_IRQ          { IRQ_PBA8_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PBA8_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PBA8_WATCHDOG_IRQ      { IRQ_PBA8_WATCHDOG, NO_IRQ }
-#define PBA8_GPIO0_IRQ         { IRQ_PBA8_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PBA8_GPIO1, NO_IRQ }
-#define PBA8_RTC_IRQ           { IRQ_PBA8_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PBA8_SCI, NO_IRQ }
-#define PBA8_UART0_IRQ         { IRQ_PBA8_UART0, NO_IRQ }
-#define PBA8_UART1_IRQ         { IRQ_PBA8_UART1, NO_IRQ }
-#define PBA8_UART2_IRQ         { IRQ_PBA8_UART2, NO_IRQ }
-#define PBA8_UART3_IRQ         { IRQ_PBA8_UART3, NO_IRQ }
-#define PBA8_SSP_IRQ           { IRQ_PBA8_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_PBA8_KMI0 }
+#define KMI1_IRQ               { IRQ_PBA8_KMI1 }
+#define PBA8_SMC_IRQ           { }
+#define MPMC_IRQ               { }
+#define PBA8_CLCD_IRQ          { IRQ_PBA8_CLCD }
+#define DMAC_IRQ               { IRQ_PBA8_DMAC }
+#define SCTL_IRQ               { }
+#define PBA8_WATCHDOG_IRQ      { IRQ_PBA8_WATCHDOG }
+#define PBA8_GPIO0_IRQ         { IRQ_PBA8_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PBA8_GPIO1 }
+#define PBA8_RTC_IRQ           { IRQ_PBA8_RTC }
+#define SCI_IRQ                        { IRQ_PBA8_SCI }
+#define PBA8_UART0_IRQ         { IRQ_PBA8_UART0 }
+#define PBA8_UART1_IRQ         { IRQ_PBA8_UART1 }
+#define PBA8_UART2_IRQ         { IRQ_PBA8_UART2 }
+#define PBA8_UART3_IRQ         { IRQ_PBA8_UART3 }
+#define PBA8_SSP_IRQ           { IRQ_PBA8_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,      "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,      "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,      "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,     "fpga:uart3",   PBA8_UART3,     NULL);
+APB_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,      "fpga:uart3",   PBA8_UART3,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,       "dev:smc",      PBA8_SMC,       NULL);
-AMBA_DEVICE(sctl,      "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,      "dev:wdog",     PBA8_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,     "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
-AMBA_DEVICE(gpio1,     "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,     "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,       "dev:rtc",      PBA8_RTC,       NULL);
-AMBA_DEVICE(sci0,      "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,     "dev:uart0",    PBA8_UART0,     NULL);
-AMBA_DEVICE(uart1,     "dev:uart1",    PBA8_UART1,     NULL);
-AMBA_DEVICE(uart2,     "dev:uart2",    PBA8_UART2,     NULL);
-AMBA_DEVICE(ssp0,      "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
+AHB_DEVICE(smc,                "dev:smc",      PBA8_SMC,       NULL);
+AHB_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,       "dev:wdog",     PBA8_WATCHDOG, NULL);
+APB_DEVICE(gpio0,      "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
+APB_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,                "dev:rtc",      PBA8_RTC,       NULL);
+APB_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,      "dev:uart0",    PBA8_UART0,     NULL);
+APB_DEVICE(uart1,      "dev:uart1",    PBA8_UART1,     NULL);
+APB_DEVICE(uart2,      "dev:uart2",    PBA8_UART2,     NULL);
+APB_DEVICE(ssp0,       "dev:ssp0",     PBA8_SSP,       &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,      "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
-AMBA_DEVICE(dmac,      "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,       "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
+AHB_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
        &dmac_device,
index 6ddcc61..3f2f605 100644 (file)
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
  * RealView PBXCore AMBA devices
  */
 
-#define GPIO2_IRQ              { IRQ_PBX_GPIO2, NO_IRQ }
-#define GPIO3_IRQ              { IRQ_PBX_GPIO3, NO_IRQ }
-#define AACI_IRQ               { IRQ_PBX_AACI, NO_IRQ }
+#define GPIO2_IRQ              { IRQ_PBX_GPIO2 }
+#define GPIO3_IRQ              { IRQ_PBX_GPIO3 }
+#define AACI_IRQ               { IRQ_PBX_AACI }
 #define MMCI0_IRQ              { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
-#define KMI0_IRQ               { IRQ_PBX_KMI0, NO_IRQ }
-#define KMI1_IRQ               { IRQ_PBX_KMI1, NO_IRQ }
-#define PBX_SMC_IRQ            { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ               { NO_IRQ, NO_IRQ }
-#define PBX_CLCD_IRQ           { IRQ_PBX_CLCD, NO_IRQ }
-#define DMAC_IRQ               { IRQ_PBX_DMAC, NO_IRQ }
-#define SCTL_IRQ               { NO_IRQ, NO_IRQ }
-#define PBX_WATCHDOG_IRQ       { IRQ_PBX_WATCHDOG, NO_IRQ }
-#define PBX_GPIO0_IRQ          { IRQ_PBX_GPIO0, NO_IRQ }
-#define GPIO1_IRQ              { IRQ_PBX_GPIO1, NO_IRQ }
-#define PBX_RTC_IRQ            { IRQ_PBX_RTC, NO_IRQ }
-#define SCI_IRQ                        { IRQ_PBX_SCI, NO_IRQ }
-#define PBX_UART0_IRQ          { IRQ_PBX_UART0, NO_IRQ }
-#define PBX_UART1_IRQ          { IRQ_PBX_UART1, NO_IRQ }
-#define PBX_UART2_IRQ          { IRQ_PBX_UART2, NO_IRQ }
-#define PBX_UART3_IRQ          { IRQ_PBX_UART3, NO_IRQ }
-#define PBX_SSP_IRQ            { IRQ_PBX_SSP, NO_IRQ }
+#define KMI0_IRQ               { IRQ_PBX_KMI0 }
+#define KMI1_IRQ               { IRQ_PBX_KMI1 }
+#define PBX_SMC_IRQ            { }
+#define MPMC_IRQ               { }
+#define PBX_CLCD_IRQ           { IRQ_PBX_CLCD }
+#define DMAC_IRQ               { IRQ_PBX_DMAC }
+#define SCTL_IRQ               { }
+#define PBX_WATCHDOG_IRQ       { IRQ_PBX_WATCHDOG }
+#define PBX_GPIO0_IRQ          { IRQ_PBX_GPIO0 }
+#define GPIO1_IRQ              { IRQ_PBX_GPIO1 }
+#define PBX_RTC_IRQ            { IRQ_PBX_RTC }
+#define SCI_IRQ                        { IRQ_PBX_SCI }
+#define PBX_UART0_IRQ          { IRQ_PBX_UART0 }
+#define PBX_UART1_IRQ          { IRQ_PBX_UART1 }
+#define PBX_UART2_IRQ          { IRQ_PBX_UART2 }
+#define PBX_UART3_IRQ          { IRQ_PBX_UART3 }
+#define PBX_SSP_IRQ            { IRQ_PBX_SSP }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,      "fpga:aaci",    AACI,           NULL);
-AMBA_DEVICE(mmc0,      "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,      "fpga:kmi0",    KMI0,           NULL);
-AMBA_DEVICE(kmi1,      "fpga:kmi1",    KMI1,           NULL);
-AMBA_DEVICE(uart3,     "fpga:uart3",   PBX_UART3,      NULL);
+APB_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+APB_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+APB_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+APB_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+APB_DEVICE(uart3,      "fpga:uart3",   PBX_UART3,      NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,       "dev:smc",      PBX_SMC,        NULL);
-AMBA_DEVICE(sctl,      "dev:sctl",     SCTL,           NULL);
-AMBA_DEVICE(wdog,      "dev:wdog",     PBX_WATCHDOG,   NULL);
-AMBA_DEVICE(gpio0,     "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
-AMBA_DEVICE(gpio1,     "dev:gpio1",    GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,     "dev:gpio2",    GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,       "dev:rtc",      PBX_RTC,        NULL);
-AMBA_DEVICE(sci0,      "dev:sci0",     SCI,            NULL);
-AMBA_DEVICE(uart0,     "dev:uart0",    PBX_UART0,      NULL);
-AMBA_DEVICE(uart1,     "dev:uart1",    PBX_UART1,      NULL);
-AMBA_DEVICE(uart2,     "dev:uart2",    PBX_UART2,      NULL);
-AMBA_DEVICE(ssp0,      "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
+AHB_DEVICE(smc,        "dev:smc",      PBX_SMC,        NULL);
+AHB_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+APB_DEVICE(wdog,       "dev:wdog",     PBX_WATCHDOG,   NULL);
+APB_DEVICE(gpio0,      "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
+APB_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+APB_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+APB_DEVICE(rtc,                "dev:rtc",      PBX_RTC,        NULL);
+APB_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+APB_DEVICE(uart0,      "dev:uart0",    PBX_UART0,      NULL);
+APB_DEVICE(uart1,      "dev:uart1",    PBX_UART1,      NULL);
+APB_DEVICE(uart2,      "dev:uart2",    PBX_UART2,      NULL);
+APB_DEVICE(ssp0,       "dev:ssp0",     PBX_SSP,        &ssp0_plat_data);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,      "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
-AMBA_DEVICE(dmac,      "issp:dmac",    DMAC,           NULL);
+AHB_DEVICE(clcd,       "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
+AHB_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
        &dmac_device,
index aa77bc9..dfa405c 100644 (file)
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                  := dma.o irq.o riscpc.o
+obj-y                  := dma.o fiq.o irq.o riscpc.o
 obj-m                  :=
 obj-n                  :=
 obj-                   :=
diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S
new file mode 100644 (file)
index 0000000..48ddd57
--- /dev/null
@@ -0,0 +1,16 @@
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <mach/hardware.h>
+#include <mach/entry-macro.S>
+
+       .text
+
+       .global rpc_default_fiq_end
+ENTRY(rpc_default_fiq_start)
+       mov     r12, #ioc_base_high
+       .if     ioc_base_low
+       orr     r12, r12, #ioc_base_low
+       .endif
+       strb    r12, [r12, #0x38]       @ Disable FIQ register
+       subs    pc, lr, #4
+rpc_default_fiq_end:
index 4e7e541..7178368 100644 (file)
@@ -10,7 +10,3 @@
        orr     \base, \base, #ioc_base_low
        .endif
        .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
deleted file mode 100644 (file)
index 359bab9..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  arch/arm/mach-rpc/include/mach/system.h
- *
- *  Copyright (C) 1996-1999 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index 2e1b530..cf0e669 100644 (file)
@@ -5,6 +5,7 @@
 #include <asm/mach/irq.h>
 #include <asm/hardware/iomd.h>
 #include <asm/irq.h>
+#include <asm/fiq.h>
 
 static void iomd_ack_irq_a(struct irq_data *d)
 {
@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = {
        .irq_unmask     = iomd_unmask_irq_fiq,
 };
 
+extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end;
+
 void __init rpc_init_irq(void)
 {
        unsigned int irq, flags;
@@ -121,6 +124,9 @@ void __init rpc_init_irq(void)
        iomd_writeb(0, IOMD_FIQMASK);
        iomd_writeb(0, IOMD_DMAMASK);
 
+       set_fiq_handler(&rpc_default_fiq_start,
+               &rpc_default_fiq_end - &rpc_default_fiq_start);
+
        for (irq = 0; irq < NR_IRQS; irq++) {
                flags = IRQF_VALID;
 
index 473b3cd..7615a14 100644 (file)
@@ -25,9 +25,6 @@
        .macro  get_irqnr_preamble, base, tmp
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
                mov     \base, #S3C24XX_VA_IRQ
@@ -71,8 +68,3 @@
                @@ exit here, Z flag unset if IRQ
 
        .endm
-
-               /* currently don't need an disable_fiq macro */
-
-               .macro  disable_fiq
-               .endm
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
deleted file mode 100644 (file)
index 5e215c1..0000000
+++ /dev/null
@@ -1,54 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/system.h
- *
- * Copyright (c) 2003 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - System function defines and includes
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-#include <mach/hardware.h>
-
-#include <mach/map.h>
-#include <mach/idle.h>
-
-#include <mach/regs-clock.h>
-
-void (*s3c24xx_idle)(void);
-
-void s3c24xx_default_idle(void)
-{
-       unsigned long tmp;
-       int i;
-
-       /* idle the system by using the idle mode which will wait for an
-        * interrupt to happen before restarting the system.
-        */
-
-       /* Warning: going into idle state upsets jtag scanning */
-
-       __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE,
-                    S3C2410_CLKCON);
-
-       /* the samsung port seems to do a loop and then unset idle.. */
-       for (i = 0; i < 50; i++) {
-               tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */
-       }
-
-       /* this bit is not cleared on re-start... */
-
-       __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE,
-                    S3C2410_CLKCON);
-}
-
-static void arch_idle(void)
-{
-       if (s3c24xx_idle != NULL)
-               (s3c24xx_idle)();
-       else
-               s3c24xx_default_idle();
-}
index aff6e85..c6eac98 100644 (file)
@@ -32,8 +32,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
-
 #include <plat/cpu-freq.h>
 
 #include <mach/regs-clock.h>
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void)
 
        /* set our idle function */
 
-       s3c24xx_idle = s3c2412_idle;
+       arm_pm_idle = s3c2412_idle;
 
        /* register our io-tables */
 
index 5287d28..08bb035 100644 (file)
@@ -44,7 +44,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/idle.h>
 #include <mach/regs-s3c2443-clock.h>
 
 #include <plat/gpio-core.h>
@@ -88,8 +87,6 @@ int __init s3c2416_init(void)
 {
        printk(KERN_INFO "S3C2416: Initializing architecture\n");
 
-       /* s3c24xx_idle = s3c2416_idle; */
-
        /* change WDT IRQ number */
        s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
        s3c_device_wdt.resource[1].end   = IRQ_S3C2443_WDT;
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index dc2bc15..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/* arch/arm/mach-s3c6400/include/mach/entry-macro.S
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *     http://armlinux.simtec.co.uk/
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * Low-level IRQ helper macros for the Samsung S3C64XX series
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
deleted file mode 100644 (file)
index 353ed43..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/system.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400 - system implementation
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-       /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
index 52b89a3..9143f8b 100644 (file)
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void)
 {
        unsigned long val;
 
-       if (!need_resched()) {
-               val = __raw_readl(S5P64X0_PWR_CFG);
-               val &= ~(0x3 << 5);
-               val |= (0x1 << 5);
-               __raw_writel(val, S5P64X0_PWR_CFG);
+       val = __raw_readl(S5P64X0_PWR_CFG);
+       val &= ~(0x3 << 5);
+       val |= (0x1 << 5);
+       __raw_writel(val, S5P64X0_PWR_CFG);
 
-               cpu_do_idle();
-       }
-       local_irq_enable();
+       cpu_do_idle();
 }
 
 /*
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void)
        printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
 
        /* set idle function */
-       pm_idle = s5p64x0_idle;
+       arm_pm_idle = s5p64x0_idle;
 
        return device_register(&s5p64x0_dev);
 }
index f820c07..f7f68ad 100644 (file)
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = {
        .peri_id = s5p6450_pdma_peri,
 };
 
-struct amba_device s5p64x0_device_pdma = {
-       .dev = {
-               .init_name = "dma-pl330",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-       },
-       .res = {
-               .start = S5P64X0_PA_PDMA,
-               .end = S5P64X0_PA_PDMA + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_DMA0, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA,
+       {IRQ_DMA0}, NULL);
 
 static int __init s5p64x0_dma_init(void)
 {
        if (soc_is_s5p6450()) {
                dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
                dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
-               s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
+               s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
        } else {
                dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
                dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
-               s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
+               s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
        }
 
-       amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
+       amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
 
        return 0;
 }
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
deleted file mode 100644 (file)
index fbb246d..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com
- *
- * Low-level IRQ helper macros for the Samsung S5P64X0
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
deleted file mode 100644 (file)
index cf26e09..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com
- *
- * S5P64X0 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-       /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
index c909573..ff71e2d 100644 (file)
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
        }
 };
 
-static void s5pc100_idle(void)
-{
-       if (!need_resched())
-               cpu_do_idle();
-
-       local_irq_enable();
-}
-
 /*
  * s5pc100_map_io
  *
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init);
 int __init s5pc100_init(void)
 {
        printk(KERN_INFO "S5PC100: Initializing architecture\n");
-
-       /* set idle function */
-       pm_idle = s5pc100_idle;
-
        return device_register(&s5pc100_dev);
 }
 
index c841f4d..96b1ab3 100644 (file)
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = {
        .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pc100_device_pdma0 = {
-       .dev = {
-               .init_name = "dma-pl330.0",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &s5pc100_pdma0_pdata,
-       },
-       .res = {
-               .start = S5PC100_PA_PDMA0,
-               .end = S5PC100_PA_PDMA0 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA0, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma0,  "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0,
+       {IRQ_PDMA0}, &s5pc100_pdma0_pdata);
 
 u8 pdma1_peri[] = {
        DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = {
        .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pc100_device_pdma1 = {
-       .dev = {
-               .init_name = "dma-pl330.1",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &s5pc100_pdma1_pdata,
-       },
-       .res = {
-               .start = S5PC100_PA_PDMA1,
-               .end = S5PC100_PA_PDMA1 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA1, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1,
+       {IRQ_PDMA1}, &s5pc100_pdma1_pdata);
 
 static int __init s5pc100_dma_init(void)
 {
        dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
-       amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+       amba_device_register(&s5pc100_pdma0_device, &iomem_resource);
 
        dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
-       amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
+       amba_device_register(&s5pc100_pdma1_device, &iomem_resource);
 
        return 0;
 }
index b8c242e..bad0700 100644 (file)
  * warranty of any kind, whether express or implied.
 */
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
        .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
deleted file mode 100644 (file)
index afc96c2..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/* linux/arch/arm/mach-s5pc100/include/mach/system.h
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- * S5PC100 - system implementation
- *
- * Based on mach-s3c6400/include/mach/system.h
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-       /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_IRQ_H */
index 9c1bcdc..4c9e902 100644 (file)
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
        }
 };
 
-static void s5pv210_idle(void)
-{
-       if (!need_resched())
-               cpu_do_idle();
-
-       local_irq_enable();
-}
-
 void s5pv210_restart(char mode, const char *cmd)
 {
        __raw_writel(0x1, S5P_SWRESET);
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init);
 int __init s5pv210_init(void)
 {
        printk(KERN_INFO "S5PV210: Initializing architecture\n");
-
-       /* set idle function */
-       pm_idle = s5pv210_idle;
-
        return device_register(&s5pv210_dev);
 }
 
index a6113e0..f6885d2 100644 (file)
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = {
        .peri_id = pdma0_peri,
 };
 
-struct amba_device s5pv210_device_pdma0 = {
-       .dev = {
-               .init_name = "dma-pl330.0",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &s5pv210_pdma0_pdata,
-       },
-       .res = {
-               .start = S5PV210_PA_PDMA0,
-               .end = S5PV210_PA_PDMA0 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA0, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0,
+       {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
 
 u8 pdma1_peri[] = {
        DMACH_UART0_RX,
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = {
        .peri_id = pdma1_peri,
 };
 
-struct amba_device s5pv210_device_pdma1 = {
-       .dev = {
-               .init_name = "dma-pl330.1",
-               .dma_mask = &dma_dmamask,
-               .coherent_dma_mask = DMA_BIT_MASK(32),
-               .platform_data = &s5pv210_pdma1_pdata,
-       },
-       .res = {
-               .start = S5PV210_PA_PDMA1,
-               .end = S5PV210_PA_PDMA1 + SZ_4K,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_PDMA1, NO_IRQ},
-       .periphid = 0x00041330,
-};
+AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1,
+       {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
 
 static int __init s5pv210_dma_init(void)
 {
        dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
-       amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
+       amba_device_register(&s5pv210_pdma0_device, &iomem_resource);
 
        dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
        dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
-       amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
+       amba_device_register(&s5pv210_pdma1_device, &iomem_resource);
 
        return 0;
 }
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
deleted file mode 100644 (file)
index bebca1b..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com/
- *
- * Low-level IRQ helper macros for the Samsung S5PV210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
deleted file mode 100644 (file)
index bf288ce..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/system.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com/
- *
- * S5PV210 - system support header
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H __FILE__
-
-static void arch_idle(void)
-{
-       /* nothing here yet */
-}
-
-#endif /* __ASM_ARCH_SYSTEM_H */
index 6aa13c4..8cf7630 100644 (file)
@@ -8,17 +8,11 @@
  * warranty of any kind, whether express or implied.
  */
 
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                mov     \base, #0xfa000000              @ ICIP = 0xfa050000
                add     \base, \base, #0x00050000
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \irqstat, [\base]               @ get irqs
                ldr     \irqnr, [\base, #4]             @ ICMR = 0xfa050004
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
deleted file mode 100644 (file)
index e17b208..0000000
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/system.h
- *
- * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index a851c25..6a2a7f2 100644 (file)
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = {
        .init           = shark_timer_init,
 };
 
+static void shark_init_early(void)
+{
+       disable_hlt();
+}
+
 MACHINE_START(SHARK, "Shark")
        /* Maintainer: Alexander Schulz */
        .atag_offset    = 0x3000,
        .map_io         = shark_map_io,
+       .init_early     = shark_init_early,
        .init_irq       = shark_init_irq,
        .timer          = &shark_timer,
        .dma_zone_size  = SZ_4M,
index 0bb6cc6..5901b09 100644 (file)
@@ -7,16 +7,10 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-               .macro  disable_fiq
-               .endm
-
                .macro  get_irqnr_preamble, base, tmp
                mov     \base, #0xe0000000
                .endm
 
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
                mov     \irqstat, #0x0C
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
deleted file mode 100644 (file)
index 1b2f2c5..0000000
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/system.h
- *
- * by Alexander Schulz
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 2a57b29..0000000
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2010  Paul Mundt
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
index 956ac18..3bbcb3f 100644 (file)
@@ -1,11 +1,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
-
 static inline void arch_reset(char mode, const char *cmd)
 {
        soft_restart(0);
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index de3bb41..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h
deleted file mode 100644 (file)
index 92cee63..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/system.h
- *
- * SPEAr3xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif /* __MACH_SYSTEM_H */
index a5e46b4..9da50e2 100644 (file)
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = {
        .irq_base       = SPEAR300_GPIO1_INT_BASE,
 };
 
-struct amba_device spear300_gpio1_device = {
-       .dev = {
-               .init_name = "gpio1",
-               .platform_data = &gpio1_plat_data,
-       },
-       .res = {
-               .start = SPEAR300_GPIO_BASE,
-               .end = SPEAR300_GPIO_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE,
+       {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data);
 
 /* spear300 routines */
 void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
index 10af45d..b1733c3 100644 (file)
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = {
        .irq_base       = SPEAR3XX_GPIO_INT_BASE,
 };
 
-struct amba_device spear3xx_gpio_device = {
-       .dev = {
-               .init_name = "gpio",
-               .platform_data = &gpio_plat_data,
-       },
-       .res = {
-               .start = SPEAR3XX_ICM3_GPIO_BASE,
-               .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE,
+       {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data);
 
 /* uart device registration */
-struct amba_device spear3xx_uart_device = {
-       .dev = {
-               .init_name = "uart",
-       },
-       .res = {
-               .start = SPEAR3XX_ICM1_UART_BASE,
-               .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {SPEAR3XX_IRQ_UART, NO_IRQ},
-};
+AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE,
+       {SPEAR3XX_IRQ_UART}, NULL);
 
 /* Do spear3xx familiy common initialization part here */
 void __init spear3xx_init(void)
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
deleted file mode 100644 (file)
index d490a91..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h
deleted file mode 100644 (file)
index 0b1d2be..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/system.h
- *
- * SPEAr6xx Machine family specific architecture functions
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SYSTEM_H
-#define __MACH_SYSTEM_H
-
-#include <plat/system.h>
-
-#endif /* __MACH_SYSTEM_H */
index e0f6628..b997b1b 100644 (file)
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = {
                        .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
                        .flags = IORESOURCE_MEM,
                },
-               .irq = {IRQ_UART_0, NO_IRQ},
+               .irq = {IRQ_UART_0},
        }, {
                .dev = {
                        .init_name = "uart1",
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = {
                        .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
                        .flags = IORESOURCE_MEM,
                },
-               .irq = {IRQ_UART_1, NO_IRQ},
+               .irq = {IRQ_UART_1},
        }
 };
 
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = {
                        .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
                        .flags = IORESOURCE_MEM,
                },
-               .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
+               .irq = {IRQ_LOCAL_GPIO},
        }, {
                .dev = {
                        .init_name = "gpio1",
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = {
                        .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
                        .flags = IORESOURCE_MEM,
                },
-               .irq = {IRQ_BASIC_GPIO, NO_IRQ},
+               .irq = {IRQ_BASIC_GPIO},
        }, {
                .dev = {
                        .init_name = "gpio2",
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = {
                        .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
                        .flags = IORESOURCE_MEM,
                },
-               .irq = {IRQ_APPL_GPIO, NO_IRQ},
+               .irq = {IRQ_APPL_GPIO},
        }
 };
 
index 373652d..6ae7882 100644 (file)
@@ -8,8 +8,16 @@ config ARCH_TEGRA_2x_SOC
        select ARM_GIC
        select ARCH_REQUIRE_GPIOLIB
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-       select USB_ULPI if USB_SUPPORT
+       select USB_ULPI if USB
        select USB_ULPI_VIEWPORT if USB_SUPPORT
+       select ARM_ERRATA_720789
+       select ARM_ERRATA_742230
+       select ARM_ERRATA_751472
+       select ARM_ERRATA_754327
+       select ARM_ERRATA_764369
+       select PL310_ERRATA_727915 if CACHE_L2X0
+       select PL310_ERRATA_769419 if CACHE_L2X0
+       select CPU_FREQ_TABLE if CPU_FREQ
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -20,9 +28,15 @@ config ARCH_TEGRA_3x_SOC
        select ARM_GIC
        select ARCH_REQUIRE_GPIOLIB
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-       select USB_ULPI if USB_SUPPORT
+       select USB_ULPI if USB
        select USB_ULPI_VIEWPORT if USB_SUPPORT
        select USE_OF
+       select ARM_ERRATA_743622
+       select ARM_ERRATA_751472
+       select ARM_ERRATA_754322
+       select ARM_ERRATA_764369
+       select PL310_ERRATA_769419 if CACHE_L2X0
+       select CPU_FREQ_TABLE if CPU_FREQ
        help
          Support for NVIDIA Tegra T30 processor family, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
index f7d0443..bcbb4e8 100644 (file)
@@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC)               += tegra2_emc.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)                += pinmux-tegra20-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)                += pinmux-tegra30-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)                += board-dt-tegra30.o
-obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
+obj-$(CONFIG_SMP)                      += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
 obj-$(CONFIG_TEGRA_SYSTEM_DMA)         += dma.o
 obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
index 465808c..1af85bc 100644 (file)
@@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
        {TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_GPU,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
-       {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
@@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
        {TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
-       {TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
+       {TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},
        {TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
index a2eb901..fac449e 100644 (file)
@@ -27,7 +27,6 @@
 #include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
-#include <mach/system.h>
 
 #include "board.h"
 #include "clock.h"
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
deleted file mode 100644 (file)
index e577cfe..0000000
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-tegra/include/mach/entry-macro.S
- *
- * Copyright (C) 2009 Palm, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
deleted file mode 100644 (file)
index a312988..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/system.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *     Colin Cross <ccross@google.com>
- *     Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_SYSTEM_H
-#define __MACH_TEGRA_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-}
-
-#endif
index af8b634..9153699 100644 (file)
@@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void)
        afi_writel(0, AFI_MSI_BAR_SZ);
 }
 
-static void tegra_pcie_enable_controller(void)
+static int tegra_pcie_enable_controller(void)
 {
        u32 val, reg;
-       int i;
+       int i, timeout;
 
        /* Enable slot clock and pulse the reset signals */
        for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) {
@@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void)
        pads_writel(0xfa5cfa5c, 0xc8);
 
        /* Wait for the PLL to lock */
+       timeout = 300;
        do {
                val = pads_readl(PADS_PLL_CTL);
+               usleep_range(1000, 1000);
+               if (--timeout == 0) {
+                       pr_err("Tegra PCIe error: timeout waiting for PLL\n");
+                       return -EBUSY;
+               }
        } while (!(val & PADS_PLL_CTL_LOCKDET));
 
        /* turn off IDDQ override */
@@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void)
        /* Disable all execptions */
        afi_writel(0, AFI_FPCI_ERROR_MASKS);
 
-       return;
+       return 0;
 }
 
 static void tegra_pcie_xclk_clamp(bool clamp)
@@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
        if (err)
                return err;
 
-       tegra_pcie_enable_controller();
+       err = tegra_pcie_enable_controller();
+       if (err)
+               return err;
 
        /* setup the AFI address translations */
        tegra_pcie_setup_translations();
index 37576a7..6091cf3 100644 (file)
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
@@ -730,6 +731,7 @@ err0:
        kfree(phy);
        return ERR_PTR(err);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_open);
 
 int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
 {
@@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
        else
                return utmi_phy_power_on(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on);
 
 void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
 {
@@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
        else
                utmi_phy_power_off(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off);
 
 void tegra_usb_phy_preresume(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_preresume(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume);
 
 void tegra_usb_phy_postresume(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_postresume(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume);
 
 void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
                                 enum tegra_usb_phy_port_speed port_speed)
@@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
        if (!phy_is_ulpi(phy))
                utmi_phy_restore_start(phy, port_speed);
 }
+EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start);
 
 void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_restore_end(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end);
 
 void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_clk_disable(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable);
 
 void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy)
 {
        if (!phy_is_ulpi(phy))
                utmi_phy_clk_enable(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable);
 
 void tegra_usb_phy_close(struct tegra_usb_phy *phy)
 {
@@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy)
        clk_put(phy->pll_u);
        kfree(phy);
 }
+EXPORT_SYMBOL_GPL(tegra_usb_phy_close);
index b4c6926..b986560 100644 (file)
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = {
 #endif
 };
 
-static struct amba_device uart0_device = {
-       .dev = {
-               .coherent_dma_mask = ~0,
-               .init_name = "uart0", /* Slow device at 0x3000 offset */
-               .platform_data = &uart0_plat_data,
-       },
-       .res = {
-               .start = U300_UART0_BASE,
-               .end   = U300_UART0_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = { IRQ_U300_UART0, NO_IRQ },
-};
+/* Slow device at 0x3000 offset */
+static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE,
+       { IRQ_U300_UART0 }, &uart0_plat_data);
 
 /* The U335 have an additional UART1 on the APP CPU */
 #ifdef CONFIG_MACH_U300_BS335
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = {
 #endif
 };
 
-static struct amba_device uart1_device = {
-       .dev = {
-               .coherent_dma_mask = ~0,
-               .init_name = "uart1", /* Fast device at 0x7000 offset */
-               .platform_data = &uart1_plat_data,
-       },
-       .res = {
-               .start = U300_UART1_BASE,
-               .end   = U300_UART1_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = { IRQ_U300_UART1, NO_IRQ },
-};
+/* Fast device at 0x7000 offset */
+static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE,
+       { IRQ_U300_UART1 }, &uart1_plat_data);
 #endif
 
-static struct amba_device pl172_device = {
-       .dev = {
-               .init_name = "pl172", /* AHB device at 0x4000 offset */
-               .platform_data = NULL,
-       },
-       .res = {
-               .start = U300_EMIF_CFG_BASE,
-               .end   = U300_EMIF_CFG_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-};
+/* AHB device at 0x4000 offset */
+static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL);
 
 
 /*
  * Everything within this next ifdef deals with external devices connected to
  * the APP SPI bus.
  */
-static struct amba_device pl022_device = {
-       .dev = {
-               .coherent_dma_mask = ~0,
-               .init_name = "pl022", /* Fast device at 0x6000 offset */
-       },
-       .res = {
-               .start = U300_SPI_BASE,
-               .end   = U300_SPI_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_U300_SPI, NO_IRQ },
-       /*
-        * This device has a DMA channel but the Linux driver does not use
-        * it currently.
-        */
-};
+/* Fast device at 0x6000 offset */
+static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE,
+       { IRQ_U300_SPI }, NULL);
 
-static struct amba_device mmcsd_device = {
-       .dev = {
-               .init_name = "mmci", /* Fast device at 0x1000 offset */
-               .platform_data = NULL, /* Added later */
-       },
-       .res = {
-               .start = U300_MMCSD_BASE,
-               .end   = U300_MMCSD_BASE + SZ_4K - 1,
-               .flags = IORESOURCE_MEM,
-       },
-       .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
-       /*
-        * This device has a DMA channel but the Linux driver does not use
-        * it currently.
-        */
-};
+/* Fast device at 0x1000 offset */
+#define U300_MMCSD_IRQS        { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
+
+static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE,
+       U300_MMCSD_IRQS, NULL);
 
 /*
  * The order of device declaration may be important, since some devices
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 7181d6a..0000000
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- *
- * arch-arm/mach-u300/include/mach/entry-macro.S
- *
- *
- * Copyright (C) 2006-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Low-level IRQ helper macros for ST-Ericsson U300
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
deleted file mode 100644 (file)
index 574d46e..0000000
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/system.h
- *
- *
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * System shutdown and reset functions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-static inline void arch_idle(void)
-{
-       cpu_do_idle();
-}
index c563e54..898a645 100644 (file)
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
        struct amba_device *dev;
        int ret;
 
-       dev = kzalloc(sizeof *dev, GFP_KERNEL);
+       dev = amba_device_alloc(name, base, SZ_4K);
        if (!dev)
                return ERR_PTR(-ENOMEM);
 
-       dev->dev.init_name = name;
-
-       dev->res.start = base;
-       dev->res.end = base + SZ_4K - 1;
-       dev->res.flags = IORESOURCE_MEM;
-
        dev->dma_mask = DMA_BIT_MASK(32);
        dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 
        dev->irq[0] = irq;
-       dev->irq[1] = NO_IRQ;
 
        dev->periphid = periphid;
 
        dev->dev.platform_data = pdata;
 
-       ret = amba_device_register(dev, &iomem_resource);
+       ret = amba_device_add(dev, &iomem_resource);
        if (ret) {
-               kfree(dev);
+               amba_device_put(dev);
                return ERR_PTR(ret);
        }
 
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
deleted file mode 100644 (file)
index e16299e..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * Low-level IRQ helper macros for U8500 platforms
- *
- * Copyright (C) 2009 ST-Ericsson.
- *
- * This file is a copy of ARM Realview platform.
- *     -just satisfied checkpatch script.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
deleted file mode 100644 (file)
index 258e5c9..0000000
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2009 ST-Ericsson.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index 02b7b93..4f352e4 100644 (file)
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = {
        .num_chipselect = 1,
 };
 
-#define AACI_IRQ       { IRQ_AACI, NO_IRQ }
+#define AACI_IRQ       { IRQ_AACI }
 #define MMCI0_IRQ      { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
-#define KMI0_IRQ       { IRQ_SIC_KMI0, NO_IRQ }
-#define KMI1_IRQ       { IRQ_SIC_KMI1, NO_IRQ }
+#define KMI0_IRQ       { IRQ_SIC_KMI0 }
+#define KMI1_IRQ       { IRQ_SIC_KMI1 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
-#define SMC_IRQ                { NO_IRQ, NO_IRQ }
-#define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define CLCD_IRQ       { IRQ_CLCDINT, NO_IRQ }
-#define DMAC_IRQ       { IRQ_DMAINT, NO_IRQ }
+#define SMC_IRQ                { }
+#define MPMC_IRQ       { }
+#define CLCD_IRQ       { IRQ_CLCDINT }
+#define DMAC_IRQ       { IRQ_DMAINT }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define WATCHDOG_IRQ   { IRQ_WDOGINT, NO_IRQ }
-#define GPIO0_IRQ      { IRQ_GPIOINT0, NO_IRQ }
-#define GPIO1_IRQ      { IRQ_GPIOINT1, NO_IRQ }
-#define RTC_IRQ                { IRQ_RTCINT, NO_IRQ }
+#define SCTL_IRQ       { }
+#define WATCHDOG_IRQ   { IRQ_WDOGINT }
+#define GPIO0_IRQ      { IRQ_GPIOINT0 }
+#define GPIO1_IRQ      { IRQ_GPIOINT1 }
+#define RTC_IRQ                { IRQ_RTCINT }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
-#define SCI_IRQ                { IRQ_SCIINT, NO_IRQ }
-#define UART0_IRQ      { IRQ_UARTINT0, NO_IRQ }
-#define UART1_IRQ      { IRQ_UARTINT1, NO_IRQ }
-#define UART2_IRQ      { IRQ_UARTINT2, NO_IRQ }
-#define SSP_IRQ                { IRQ_SSPINT, NO_IRQ }
+#define SCI_IRQ                { IRQ_SCIINT }
+#define UART0_IRQ      { IRQ_UARTINT0 }
+#define UART1_IRQ      { IRQ_UARTINT1 }
+#define UART2_IRQ      { IRQ_UARTINT2 }
+#define SSP_IRQ                { IRQ_SSPINT }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
+APB_DEVICE(aaci,  "fpga:04", AACI,     NULL);
+APB_DEVICE(mmc0,  "fpga:05", MMCI0,    &mmc0_plat_data);
+APB_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
+APB_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
-AMBA_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
-AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
-AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
-AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
-AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
-AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
+AHB_DEVICE(smc,   "dev:00",  SMC,      NULL);
+AHB_DEVICE(mpmc,  "dev:10",  MPMC,     NULL);
+AHB_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
+AHB_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
+APB_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
+APB_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
+APB_DEVICE(gpio0, "dev:e4",  GPIO0,    &gpio0_plat_data);
+APB_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
+APB_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
+APB_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
+APB_DEVICE(uart0, "dev:f1",  UART0,    NULL);
+APB_DEVICE(uart1, "dev:f2",  UART1,    NULL);
+APB_DEVICE(uart2, "dev:f3",  UART2,    NULL);
+APB_DEVICE(ssp0,  "dev:f4",  SSP,      &ssp0_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
        &dmac_device,
index 2ef2f55..683e607 100644 (file)
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev);
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
 #endif
 
-#define AMBA_DEVICE(name,busid,base,plat)                      \
-static struct amba_device name##_device = {                    \
-       .dev            = {                                     \
-               .coherent_dma_mask = ~0,                        \
-               .init_name = busid,                             \
-               .platform_data = plat,                          \
-       },                                                      \
-       .res            = {                                     \
-               .start  = VERSATILE_##base##_BASE,              \
-               .end    = (VERSATILE_##base##_BASE) + SZ_4K - 1,\
-               .flags  = IORESOURCE_MEM,                       \
-       },                                                      \
-       .dma_mask       = ~0,                                   \
-       .irq            = base##_IRQ,                           \
-}
+#define APB_DEVICE(name, busid, base, plat)    \
+static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
+
+#define AHB_DEVICE(name, busid, base, plat)    \
+static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
 
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
deleted file mode 100644 (file)
index b6f0dbf..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * arch/arm/mach-versatile/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for Versatile platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
deleted file mode 100644 (file)
index f3fa347..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index 9581c19..1973833 100644 (file)
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = {
        .irq_base       = IRQ_GPIO3_START,
 };
 
-#define UART3_IRQ      { IRQ_SIC_UART3, NO_IRQ }
-#define SCI1_IRQ       { IRQ_SIC_SCI3, NO_IRQ }
+#define UART3_IRQ      { IRQ_SIC_UART3 }
+#define SCI1_IRQ       { IRQ_SIC_SCI3 }
 #define MMCI1_IRQ      { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
 
 /*
  * These devices are connected via the core APB bridge
  */
-#define GPIO2_IRQ      { IRQ_GPIOINT2, NO_IRQ }
-#define GPIO3_IRQ      { IRQ_GPIOINT3, NO_IRQ }
+#define GPIO2_IRQ      { IRQ_GPIOINT2 }
+#define GPIO3_IRQ      { IRQ_GPIOINT3 }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
 
 /* FPGA Primecells */
-AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
-AMBA_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
-AMBA_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
+APB_DEVICE(uart3, "fpga:09", UART3,    NULL);
+APB_DEVICE(sci1,  "fpga:0a", SCI1,     NULL);
+APB_DEVICE(mmc1,  "fpga:0b", MMCI1,    &mmc1_plat_data);
 
 /* DevChip Primecells */
-AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
+APB_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
+APB_DEVICE(gpio3, "dev:e7",  GPIO3,    &gpio3_plat_data);
 
 static struct amba_device *amba_devs[] __initdata = {
        &uart3_device,
index 3508f6e..33c5a82 100644 (file)
@@ -1,20 +1,3 @@
-#define AMBA_DEVICE(name,busid,base,plat)      \
-struct amba_device name##_device = {           \
-       .dev            = {                     \
-               .coherent_dma_mask = ~0UL,      \
-               .init_name = busid,             \
-               .platform_data = plat,          \
-       },                                      \
-       .res            = {                     \
-               .start  = base,                 \
-               .end    = base + SZ_4K - 1,     \
-               .flags  = IORESOURCE_MEM,       \
-       },                                      \
-       .dma_mask       = ~0UL,                 \
-       .irq            = IRQ_##base,           \
-       /* .dma         = DMA_##base,*/         \
-}
-
 /* 2MB large area for motherboard's peripherals static mapping */
 #define V2M_PERIPH 0xf8000000
 
index e5abe85..c65cc3b 100644 (file)
@@ -92,10 +92,10 @@ static struct clcd_board ct_ca9x4_clcd_data = {
        .remove         = versatile_clcd_remove_dma,
 };
 
-static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
-static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
-static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
-static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
+static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
+static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL);
+static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL);
+static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL);
 
 static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
        &clcd_device,
index 2260fde..84acf84 100644 (file)
@@ -32,7 +32,7 @@
  * Interrupts.  Those in {} are for AMBA devices
  */
 #define IRQ_CT_CA9X4_CLCDC     { 76 }
-#define IRQ_CT_CA9X4_DMC       { -1 }
+#define IRQ_CT_CA9X4_DMC       { 0 }
 #define IRQ_CT_CA9X4_SMC       { 77, 78 }
 #define IRQ_CT_CA9X4_TIMER0    80
 #define IRQ_CT_CA9X4_TIMER1    81
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
deleted file mode 100644 (file)
index a14f9e6..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-       .macro  disable_fiq
-       .endm
-
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
deleted file mode 100644 (file)
index f653a8e..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/system.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-static inline void arch_idle(void)
-{
-       /*
-        * This should do all the clock switching
-        * and wait for interrupt tricks
-        */
-       cpu_do_idle();
-}
-
-#endif
index c76f914..663a988 100644 (file)
@@ -288,16 +288,16 @@ static struct mmci_platform_data v2m_mmci_data = {
        .status         = v2m_mmci_status,
 };
 
-static AMBA_DEVICE(aaci,  "mb:aaci",  V2M_AACI, NULL);
-static AMBA_DEVICE(mmci,  "mb:mmci",  V2M_MMCI, &v2m_mmci_data);
-static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
-static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
-static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
-static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
-static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
-static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
-static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
-static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);
+static AMBA_APB_DEVICE(aaci,  "mb:aaci",  0, V2M_AACI, IRQ_V2M_AACI, NULL);
+static AMBA_APB_DEVICE(mmci,  "mb:mmci",  0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
+static AMBA_APB_DEVICE(kmi0,  "mb:kmi0",  0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
+static AMBA_APB_DEVICE(kmi1,  "mb:kmi1",  0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
+static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
+static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
+static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
+static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
+static AMBA_APB_DEVICE(wdt,   "mb:wdt",   0, V2M_WDT, IRQ_V2M_WDT, NULL);
+static AMBA_APB_DEVICE(rtc,   "mb:rtc",   0, V2M_RTC, IRQ_V2M_RTC, NULL);
 
 static struct amba_device *v2m_amba_devs[] __initdata = {
        &aaci_device,
index 92684c7..367d1b5 100644 (file)
@@ -8,18 +8,12 @@
  * warranty of any kind, whether express or implied.
  */
 
-       .macro  disable_fiq
-       .endm
-
        .macro  get_irqnr_preamble, base, tmp
        @ physical 0xd8140000 is virtual 0xf8140000
        mov     \base, #0xf8000000
        orr     \base, \base, #0x00140000
        .endm
 
-       .macro  arch_ret_to_user, tmp1, tmp2
-       .endm
-
        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
       &n