i2c: tegra: rename fast clock and div clock
Laxman Dewangan [Wed, 29 Aug 2012 09:49:04 +0000 (14:49 +0530)]
Rename fast clock to "fast-clk" and div clock to
"div-clk" in driver and clock table to have aligned
with mainline as:
This is based on change:
---------
commit f16e6e77a105ec53496f0d8343895da342917873
Author: Laxman Dewangan <ldewangan@nvidia.com>
    i2c: tegra: pass proper name for getting clock
---------

Change-Id: Ie9a1972a18e2e60ac7c84c4509860cf72405ef16
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/128150

arch/arm/mach-tegra/tegra2_clocks.c
arch/arm/mach-tegra/tegra30_clocks.c
drivers/i2c/busses/i2c-tegra.c

index cc9b046..c4bd803 100644 (file)
@@ -2488,14 +2488,14 @@ static struct clk tegra_list_periph_clks[] = {
        PERIPH_CLK("owr",       "tegra_w1",             NULL,   71,     0x1cc,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("nor",       "tegra-nor",            NULL,   42,     0x1d0,  0x31E,  92000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71), /* requires min voltage */
        PERIPH_CLK("mipi",      "mipi",                 NULL,   50,     0x174,  0x31E,  60000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB), /* scales with voltage */
-       PERIPH_CLK("i2c1",      "tegra-i2c.0",          "i2c-div",      12,     0x124,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c2",      "tegra-i2c.1",          "i2c-div",      54,     0x198,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c3",      "tegra-i2c.2",          "i2c-div",      67,     0x1b8,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("dvc",       "tegra-i2c.3",          "i2c-div",      47,     0x128,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c1-fast", "tegra-i2c.0",          "i2c-fast",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c2-fast", "tegra-i2c.1",          "i2c-fast",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c3-fast", "tegra-i2c.2",          "i2c-fast",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("dvc-fast",  "tegra-i2c.3",          "i2c-fast",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c1",      "tegra-i2c.0",          "div-clk",      12,     0x124,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c2",      "tegra-i2c.1",          "div-clk",      54,     0x198,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c3",      "tegra-i2c.2",          "div-clk",      67,     0x1b8,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("dvc",       "tegra-i2c.3",          "div-clk",      47,     0x128,  0x31E,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c1-fast", "tegra-i2c.0",          "fast-clk",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c2-fast", "tegra-i2c.1",          "fast-clk",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c3-fast", "tegra-i2c.2",          "fast-clk",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("dvc-fast",  "tegra-i2c.3",          "fast-clk",     0,      0,      0x31E,  108000000, mux_pllp_out3,       PERIPH_NO_ENB),
        PERIPH_CLK("uarta",     "tegra_uart.0",         NULL,   6,      0x178,  0x31E,  600000000, mux_pllp_pllc_pllm_clkm,     MUX | PERIPH_ON_APB),
        PERIPH_CLK("uartb",     "tegra_uart.1",         NULL,   7,      0x17c,  0x31E,  600000000, mux_pllp_pllc_pllm_clkm,     MUX | PERIPH_ON_APB),
        PERIPH_CLK("uartc",     "tegra_uart.2",         NULL,   55,     0x1a0,  0x31E,  600000000, mux_pllp_pllc_pllm_clkm,     MUX | PERIPH_ON_APB),
index 92960c0..a7c9aed 100644 (file)
@@ -4342,16 +4342,16 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("owr",       "tegra_w1",             NULL,   71,     0x1cc,  26000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB),
        PERIPH_CLK("nor",       "tegra-nor",            NULL,   42,     0x1d0,  127000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71), /* requires min voltage */
        PERIPH_CLK("mipi",      "mipi",                 NULL,   50,     0x174,  60000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | PERIPH_ON_APB), /* scales with voltage */
-       PERIPH_CLK("i2c1",      "tegra-i2c.0",          "i2c-div",      12,     0x124,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c2",      "tegra-i2c.1",          "i2c-div",      54,     0x198,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c3",      "tegra-i2c.2",          "i2c-div",      67,     0x1b8,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c4",      "tegra-i2c.3",          "i2c-div",      103,    0x3c4,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c5",      "tegra-i2c.4",          "i2c-div",      47,     0x128,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
-       PERIPH_CLK("i2c1-fast", "tegra-i2c.0",          "i2c-fast",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c2-fast", "tegra-i2c.1",          "i2c-fast",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c3-fast", "tegra-i2c.2",          "i2c-fast",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c4-fast", "tegra-i2c.3",          "i2c-fast",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
-       PERIPH_CLK("i2c5-fast", "tegra-i2c.4",          "i2c-fast",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c1",      "tegra-i2c.0",          "div-clk",      12,     0x124,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c2",      "tegra-i2c.1",          "div-clk",      54,     0x198,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c3",      "tegra-i2c.2",          "div-clk",      67,     0x1b8,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c4",      "tegra-i2c.3",          "div-clk",      103,    0x3c4,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c5",      "tegra-i2c.4",          "div-clk",      47,     0x128,  26000000,  mux_pllp_clkm,       MUX | DIV_U16 | PERIPH_ON_APB),
+       PERIPH_CLK("i2c1-fast", "tegra-i2c.0",          "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c2-fast", "tegra-i2c.1",          "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c3-fast", "tegra-i2c.2",          "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c4-fast", "tegra-i2c.3",          "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
+       PERIPH_CLK("i2c5-fast", "tegra-i2c.4",          "fast-clk",     0,      0,      108000000, mux_pllp_out3,       PERIPH_NO_ENB),
        PERIPH_CLK("uarta",     "tegra_uart.0",         NULL,   6,      0x178,  900000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
        PERIPH_CLK("uartb",     "tegra_uart.1",         NULL,   7,      0x17c,  900000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
        PERIPH_CLK("uartc",     "tegra_uart.2",         NULL,   55,     0x1a0,  900000000, mux_pllp_pllc_pllm_clkm,     MUX | DIV_U151 | DIV_U151_UART | PERIPH_ON_APB),
index 7ca36b0..ee36716 100644 (file)
@@ -1037,14 +1037,14 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
 
-       div_clk = devm_clk_get(&pdev->dev, "i2c-div");
+       div_clk = devm_clk_get(&pdev->dev, "div-clk");
        if (IS_ERR(div_clk)) {
                dev_err(&pdev->dev, "missing controller clock");
                return PTR_ERR(div_clk);
        }
 
        if (i2c_dev->chipdata->has_fast_clock) {
-               fast_clk = devm_clk_get(&pdev->dev, "i2c-fast");
+               fast_clk = devm_clk_get(&pdev->dev, "fast-clk");
                if (IS_ERR(fast_clk)) {
                        dev_err(&pdev->dev, "missing controller fast clock");
                        return PTR_ERR(fast_clk);