ARM: 5884/1: arm: Fix DCC console for v7
Tony Lindgren [Tue, 19 Jan 2010 15:40:07 +0000 (16:40 +0100)]
Without this patch arch/arm/compressed/head.S defaults to generic
DCC code that does not work for v7.

For more information on the v7 DCC, see Cortex-A8 TRM
"12.11.1 Debug communications channel".

To use it with post 2.6.33-rc1 or later, you need to have:

CONFIG_DEBUG_LL=y
ONFIG_DEBUG_ICEDCC=y
CONFIG_EARLY_PRINTK=y

Earlier kernels need commit 93fd03a8c6728b58879f8af20ffd55d9c32a778b
backported.

Tested on omap3430.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/boot/compressed/head.S
arch/arm/boot/compressed/misc.c
arch/arm/kernel/debug.S

index d356af7..4fddc50 100644 (file)
                .macro  writeb, ch, rb
                mcr     p14, 0, \ch, c0, c5, 0
                .endm
+#elif defined(CONFIG_CPU_V7)
+               .macro  loadsp, rb
+               .endm
+               .macro  writeb, ch, rb
+wait:          mrc     p14, 0, pc, c0, c1, 0
+               bcs     wait
+               mcr     p14, 0, \ch, c0, c5, 0
+               .endm
 #elif defined(CONFIG_CPU_XSCALE)
                .macro  loadsp, rb
                .endm
index af6479f..56a0d11 100644 (file)
@@ -53,6 +53,18 @@ static void icedcc_putc(int ch)
 
        asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
 }
+
+#elif defined(CONFIG_CPU_V7)
+
+static void icedcc_putc(int ch)
+{
+       asm(
+       "wait:  mrc     p14, 0, pc, c0, c1, 0                   \n\
+               bcs     wait                                    \n\
+               mcr     p14, 0, %0, c0, c5, 0                   "
+       : : "r" (ch));
+}
+
 #elif defined(CONFIG_CPU_XSCALE)
 
 static void icedcc_putc(int ch)
index b121b60..5c91add 100644 (file)
 1002:
                .endm
 
+#elif defined(CONFIG_CPU_V7)
+
+               .macro  addruart, rx
+               .endm
+
+               .macro  senduart, rd, rx
+               mcr     p14, 0, \rd, c0, c5, 0
+               .endm
+
+               .macro  busyuart, rd, rx
+busy:          mrc     p14, 0, pc, c0, c1, 0
+               bcs     busy
+               .endm
+
+               .macro  waituart, rd, rx
+wait:          mrc     p14, 0, pc, c0, c1, 0
+               bcs     wait
+
+               .endm
+
 #elif defined(CONFIG_CPU_XSCALE)
 
                .macro  addruart, rx