arm: tegra: soctherm: change period reg to u32.
David Pu [Mon, 3 Jun 2013 10:11:52 +0000 (18:11 +0800)]
SOC_THERM_EDP_OC_ALARM_OC4_THROTTLE_PERIOD_0 is 32bit reg.

Bug 1282441

Change-Id: I18710dac8d7bc77bb53d4841b9ad0468baee5dba
Signed-off-by: David Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/234940
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>

arch/arm/mach-tegra/tegra11_soctherm.h

index 64f43f2..32805f4 100644 (file)
@@ -106,7 +106,7 @@ struct soctherm_throttle {
        u8 throt_mode;
        u8 polarity;
        u8 priority;
-       u8 period;
+       u32 period;
        bool intr;
        struct soctherm_throttle_dev devs[THROTTLE_DEV_SIZE];
 };