ARM: tegra11x: Fix TimerValue data type
Bo Yan [Fri, 28 Sep 2012 01:20:06 +0000 (18:20 -0700)]
The TimerValue register in generic timer does not stop after
counting to 0, it will keep counting down. The value is the
time elapsed after event trigger.

Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/139535
(cherry picked from commit f84b23ed0c37297bf8142b69702cf8f2a1c24058)

Change-Id: I009585819b801b2eb157f9a70a3e9bf75a41ff77
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/146479
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>
Tested-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

arch/arm/mach-tegra/cpuidle-t3.c
arch/arm/mach-tegra/timer.c
arch/arm/mach-tegra/timer.h

index 69117d7..39563ac 100644 (file)
@@ -394,6 +394,10 @@ static bool tegra3_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
        if (!arch_timer_get_state(&timer_context)) {
                if ((timer_context.cntp_ctl & ARCH_TIMER_CTRL_ENABLE) &&
                    ~(timer_context.cntp_ctl & ARCH_TIMER_CTRL_IT_MASK)) {
+                       if (timer_context.cntp_tval <= 0) {
+                               tegra_cpu_wfi();
+                               return false;
+                       }
                        request = div_u64((u64)timer_context.cntp_tval *
                                        1000000, timer_context.cntfrq);
 #ifdef CONFIG_TEGRA_LP2_CPU_TIMER
@@ -463,7 +467,7 @@ static bool tegra3_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
 #endif
 #ifdef CONFIG_ARM_ARCH_TIMER
        if (!arch_timer_get_state(&timer_context))
-               sleep_completed = (timer_context.cntp_tval == 0);
+               sleep_completed = (timer_context.cntp_tval <= 0);
 #endif
 #else
        sleep_completed = !tegra_lp2_timer_remain();
index 2f1d565..4f9056e 100644 (file)
@@ -278,7 +278,7 @@ static void __init tegra_init_late_timer(void)
 #ifdef CONFIG_ARM_ARCH_TIMER
 int arch_timer_get_state(struct arch_timer_context *context)
 {
-       u32 val;
+       s32 val;
 
        asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
        context->cntp_tval = val;
@@ -291,7 +291,7 @@ int arch_timer_get_state(struct arch_timer_context *context)
 
 void arch_timer_suspend(struct arch_timer_context *context)
 {
-       u32 val;
+       s32 val;
 
        asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
        context->cntp_tval = val;
@@ -301,7 +301,7 @@ void arch_timer_suspend(struct arch_timer_context *context)
 
 void arch_timer_resume(struct arch_timer_context *context)
 {
-       u32 val;
+       s32 val;
 
        val = context->cntp_tval;
        asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r"(val));
@@ -426,7 +426,6 @@ static int arch_timer_cpu_pm_notify(struct notifier_block *self,
        case CPU_PM_EXIT:
                tegra_arch_timer_per_cpu_init();
                break;
-               break;
        }
 
        return NOTIFY_OK;
index a483ecb..b4b8192 100644 (file)
@@ -63,7 +63,7 @@ static inline void tegra_twd_resume(struct tegra_twd_context *context) {}
 
 #ifdef CONFIG_ARM_ARCH_TIMER
 struct arch_timer_context {
-       u32 cntp_tval;
+       s32 cntp_tval;
        u32 cntp_ctl;
        u32 cntfrq;
 };