usb: xhci: tegra: enable SS wake signal for active ports
Ajay Gupta [Fri, 17 May 2013 21:29:06 +0000 (14:29 -0700)]
Enabling SS wake only for active ports as passed by board file.

Bug 1268244

Change-Id: Ib0c9e94a9353b2ce3a3ece3082b86726e2c041f9
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-on: http://git-master/r/229991
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/usb/host/xhci-tegra.c

index 105b59b..7320e5d 100644 (file)
@@ -854,12 +854,17 @@ tegra_xhci_ss_wake_signal(struct tegra_xhci_hcd *tegra, bool enable)
 
        /* Assert/Deassert clamp_en_early signals to SSP0/1 */
        elpg_program0 = readl(tegra->padctl_base + ELPG_PROGRAM_0);
-       if (enable)
-               elpg_program0 |= (SSP0_ELPG_CLAMP_EN_EARLY |
-                               SSP1_ELPG_CLAMP_EN_EARLY);
-       else
-               elpg_program0 &= ~(SSP0_ELPG_CLAMP_EN_EARLY |
-                               SSP1_ELPG_CLAMP_EN_EARLY);
+       if (enable) {
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 |= SSP0_ELPG_CLAMP_EN_EARLY;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 |= SSP1_ELPG_CLAMP_EN_EARLY;
+       } else {
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 &= ~SSP0_ELPG_CLAMP_EN_EARLY;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 &= ~SSP1_ELPG_CLAMP_EN_EARLY;
+       }
        writel(elpg_program0, tegra->padctl_base + ELPG_PROGRAM_0);
 
        /*
@@ -871,10 +876,17 @@ tegra_xhci_ss_wake_signal(struct tegra_xhci_hcd *tegra, bool enable)
        /* Assert/Deassert clam_en signal */
        elpg_program0 = readl(tegra->padctl_base + ELPG_PROGRAM_0);
 
-       if (enable)
-               elpg_program0 |= (SSP0_ELPG_CLAMP_EN | SSP1_ELPG_CLAMP_EN);
-       else
-               elpg_program0 &= ~(SSP0_ELPG_CLAMP_EN | SSP1_ELPG_CLAMP_EN);
+       if (enable) {
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 |= SSP0_ELPG_CLAMP_EN;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 |= SSP1_ELPG_CLAMP_EN;
+       } else {
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P0)
+                       elpg_program0 &= ~SSP0_ELPG_CLAMP_EN;
+               if (tegra->bdata->portmap & TEGRA_XUSB_SS_P1)
+                       elpg_program0 &= ~SSP1_ELPG_CLAMP_EN;
+       }
 
        writel(elpg_program0, tegra->padctl_base + ELPG_PROGRAM_0);