ARM: tegra11: clock: Restore mselect clock
Alex Frid [Wed, 11 Jul 2012 23:20:59 +0000 (16:20 -0700)]
Fixed merge artifact - restored mselect clock.

Change-Id: Ibea7cfd9b738e406ee111c3d639204306fe2c631
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/115479
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

arch/arm/mach-tegra/tegra11_clocks.c

index 679388d..f6b550f 100644 (file)
@@ -5761,6 +5761,7 @@ struct clk tegra_list_clks[] = {
        PERIPH_CLK("pcie",      "tegra-pcie",           "pcie", 70,     0,      250000000, mux_clk_m,                   0),
        PERIPH_CLK("afi",       "tegra-pcie",           "afi",  72,     0,      250000000, mux_clk_m,                   0),
        PERIPH_CLK("se",        "se",                   NULL,   127,    0x42c,  600000000, mux_pllp_pllc2_c_c3_pllm_clkm,       MUX | MUX8 | DIV_U71 | DIV_U71_INT),
+       PERIPH_CLK("mselect",   "mselect",              NULL,   99,     0x3b4,  108000000, mux_pllp_clkm,               MUX | DIV_U71),
        PERIPH_CLK("cl_dvfs_ref", "tegra_cl_dvfs",      "ref",  155,    0x62c,  54000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | DIV_U71_INT | PERIPH_ON_APB),
        PERIPH_CLK("cl_dvfs_soc", "tegra_cl_dvfs",      "soc",  155,    0x630,  54000000,  mux_pllp_pllc_pllm_clkm,     MUX | DIV_U71 | DIV_U71_INT | PERIPH_ON_APB),