ASoC: tegra: Constraint period size to be multiple of 8
Sumit Bhattacharya [Wed, 2 Nov 2011 17:07:18 +0000 (22:07 +0530)]
Constraint period size to be multiple of 8 as Tegra DMA double
continuous mode needs transfer size to be multiple of 8.

Bug 872652
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>

Change-Id: I848373d7d137200589c0ae3cd239cd2d29499d48
Reviewed-on: http://git-master/r/61914
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: R49ecf7654c0d2e8d72bf1b6cb71d56cb66d37875

sound/soc/tegra/tegra_pcm.c

index 4e6e28e..3ad11fc 100644 (file)
@@ -170,6 +170,12 @@ static int tegra_pcm_open(struct snd_pcm_substream *substream)
        /* Set HW params now that initialization is complete */
        snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
 
+       /* Ensure period size is multiple of 8 */
+       ret = snd_pcm_hw_constraint_step(runtime, 0,
+               SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
+       if (ret < 0)
+               goto err;
+
        /* Ensure that buffer size is a multiple of period size */
        ret = snd_pcm_hw_constraint_integer(runtime,
                                                SNDRV_PCM_HW_PARAM_PERIODS);