ARM: tegra11: dvfs: Increase DFLL Vmin for AP40/AP40X
Alex Frid [Wed, 21 Aug 2013 19:09:13 +0000 (12:09 -0700)]
Increased DFLL Vmin for AP40/AP40X to 1.0V (from 0.9V).

Bug 1355044

Change-Id: Ifd95d34f21cc81877e350e287a5481ee28ea9d60
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/264513
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

arch/arm/mach-tegra/tegra11_dvfs.c

index 1e48edf..7078fd0 100644 (file)
@@ -652,12 +652,8 @@ static inline int round_cvb_voltage(int mv, int v_scale)
 
 static inline void override_min_millivolts(struct cpu_cvb_dvfs *d)
 {
-       /*
-        * override dfll min_millivolts for AP40 sku always, and for other skus
-        * if dfll Vmin designated fuse 61 is set
-        */
-       if ((tegra_sku_id == 0x6) || (tegra_sku_id == 0x8) ||
-           tegra_spare_fuse(61))
+       /* override dfll min_millivolts if dfll Vmin designated fuse 61 set */
+       if (tegra_spare_fuse(61))
                d->dfll_tune_data.min_millivolts = 900;
 
        /*