sata_sil24: Use memory barriers before issuing commands
Catalin Marinas [Thu, 10 Jun 2010 16:02:12 +0000 (17:02 +0100)]
The data in the cmd_block buffers may reach the main memory after the
writel() to the device ports. This patch introduces two calls to wmb()
to ensure the relative ordering.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Colin Tuckley <colin.tuckley@arm.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

drivers/ata/sata_sil24.c

index a7f0139..be7726d 100644 (file)
@@ -622,6 +622,11 @@ static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp,
        irq_enabled = readl(port + PORT_IRQ_ENABLE_SET);
        writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR, port + PORT_IRQ_ENABLE_CLR);
 
+       /*
+        * The barrier is required to ensure that writes to cmd_block reach
+        * the memory before the write to PORT_CMD_ACTIVATE.
+        */
+       wmb();
        writel((u32)paddr, port + PORT_CMD_ACTIVATE);
        writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4);
 
@@ -895,6 +900,11 @@ static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc)
        paddr = pp->cmd_block_dma + tag * sizeof(*pp->cmd_block);
        activate = port + PORT_CMD_ACTIVATE + tag * 8;
 
+       /*
+        * The barrier is required to ensure that writes to cmd_block reach
+        * the memory before the write to PORT_CMD_ACTIVATE.
+        */
+       wmb();
        writel((u32)paddr, activate);
        writel((u64)paddr >> 32, activate + 4);