Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes...
Linus Torvalds [Sat, 13 Sep 2008 21:47:33 +0000 (14:47 -0700)]
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
  PCI: re-add debug prints for unmodified BARs
  PCI: fix pciehp_free_irq()
  PCI Hotplug: fakephp: fix deadlock... again
  PCI: Fix printk warnings in setup-bus.c
  PCI: Fix printk warnings in probe.c
  PCI/iommu: blacklist DMAR on Intel G31/G33 chipsets

drivers/pci/hotplug/fakephp.c
drivers/pci/hotplug/pciehp_hpc.c
drivers/pci/intel-iommu.c
drivers/pci/probe.c
drivers/pci/setup-bus.c

index 40337a0..146ca9c 100644 (file)
@@ -320,15 +320,15 @@ static int disable_slot(struct hotplug_slot *slot)
                        return -ENODEV;
                }
 
+               /* remove the device from the pci core */
+               pci_remove_bus_device(dev);
+
                /* queue work item to blow away this sysfs entry and other
                 * parts.
                 */
                INIT_WORK(&dslot->remove_work, remove_slot_worker);
                queue_work(dummyphp_wq, &dslot->remove_work);
 
-               /* blow away this sysfs entry and other parts. */
-               remove_slot(dslot);
-
                pci_dev_put(dev);
        }
        return 0;
index ab31f5b..9d934dd 100644 (file)
@@ -258,7 +258,7 @@ static int pcie_poll_cmd(struct controller *ctrl)
                        return 1;
                }
        }
-       while (timeout > 1000) {
+       while (timeout > 0) {
                msleep(10);
                timeout -= 10;
                if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) {
index 8d0e60a..c3edcdc 100644 (file)
@@ -2348,11 +2348,34 @@ static void __init iommu_exit_mempool(void)
 
 }
 
+static int blacklist_iommu(const struct dmi_system_id *id)
+{
+       printk(KERN_INFO "%s detected; disabling IOMMU\n",
+              id->ident);
+       dmar_disabled = 1;
+       return 0;
+}
+
+static struct dmi_system_id __initdata intel_iommu_dmi_table[] = {
+       {       /* Some DG33BU BIOS revisions advertised non-existent VT-d */
+               .callback = blacklist_iommu,
+               .ident = "Intel DG33BU",
+               {       DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"),
+                       DMI_MATCH(DMI_BOARD_NAME, "DG33BU"),
+               }
+       },
+       { }
+};
+
+
 void __init detect_intel_iommu(void)
 {
        if (swiotlb || no_iommu || iommu_detected || dmar_disabled)
                return;
        if (early_dmar_detect()) {
+               dmi_check_system(intel_iommu_dmi_table);
+               if (dmar_disabled)
+                       return;
                iommu_detected = 1;
        }
 }
index cce2f4c..36698e5 100644 (file)
@@ -304,6 +304,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                } else {
                        res->start = l64;
                        res->end = l64 + sz64;
+                       printk(KERN_DEBUG "PCI: %s reg %x 64bit mmio: [%llx, %llx]\n",
+                               pci_name(dev), pos, (unsigned long long)res->start,
+                               (unsigned long long)res->end);
                }
        } else {
                sz = pci_size(l, sz, mask);
@@ -313,6 +316,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 
                res->start = l;
                res->end = l + sz;
+               printk(KERN_DEBUG "PCI: %s reg %x %s: [%llx, %llx]\n", pci_name(dev),
+                       pos, (res->flags & IORESOURCE_IO) ? "io port":"32bit mmio",
+                       (unsigned long long)res->start, (unsigned long long)res->end);
        }
 
  out:
@@ -383,7 +389,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                        res->start = base;
                if (!res->end)
                        res->end = limit + 0xfff;
-               printk(KERN_INFO "PCI: bridge %s io port: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s io port: [%llx, %llx]\n",
+                       pci_name(dev), (unsigned long long) res->start,
+                       (unsigned long long) res->end);
        }
 
        res = child->resource[1];
@@ -395,7 +403,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                res->start = base;
                res->end = limit + 0xfffff;
-               printk(KERN_INFO "PCI: bridge %s 32bit mmio: [%llx, %llx]\n", pci_name(dev), res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s 32bit mmio: [%llx, %llx]\n",
+                       pci_name(dev), (unsigned long long) res->start,
+                       (unsigned long long) res->end);
        }
 
        res = child->resource[2];
@@ -431,7 +441,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
                res->start = base;
                res->end = limit + 0xfffff;
-               printk(KERN_INFO "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n", pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64)?"64":"32",res->start, res->end);
+               printk(KERN_DEBUG "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n",
+                       pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
+                       (unsigned long long) res->start, (unsigned long long) res->end);
        }
 }
 
index 1aad599..3abbfad 100644 (file)
@@ -540,7 +540,11 @@ static void pci_bus_dump_res(struct pci_bus *bus)
                 if (!res)
                         continue;
 
-               printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n", bus->number, i, (res->flags & IORESOURCE_IO)? "io port":"mmio", res->start, res->end);
+               printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n",
+                       bus->number, i,
+                       (res->flags & IORESOURCE_IO) ? "io port" : "mmio",
+                       (unsigned long long) res->start,
+                       (unsigned long long) res->end);
         }
 }