Merge branch 'master' of ../net-2.6/
David S. Miller [Mon, 24 Mar 2008 05:54:03 +0000 (22:54 -0700)]
Conflicts:

net/ipv6/ndisc.c

555 files changed:
Documentation/DocBook/Makefile
Documentation/DocBook/mac80211.tmpl [new file with mode: 0644]
Documentation/feature-removal-schedule.txt
Documentation/laptops/acer-wmi.txt
Documentation/networking/bcm43xx.txt [deleted file]
MAINTAINERS
arch/s390/defconfig
drivers/net/8390.c
drivers/net/Kconfig
drivers/net/Makefile
drivers/net/appletalk/cops.c
drivers/net/arcnet/com20020.c
drivers/net/at1700.c
drivers/net/atarilance.c
drivers/net/atl1/Makefile [deleted file]
drivers/net/atl1/atl1.h [deleted file]
drivers/net/atl1/atl1_ethtool.c [deleted file]
drivers/net/atl1/atl1_hw.c [deleted file]
drivers/net/atl1/atl1_hw.h [deleted file]
drivers/net/atl1/atl1_param.c [deleted file]
drivers/net/atlx/Makefile [new file with mode: 0644]
drivers/net/atlx/atl1.c [moved from drivers/net/atl1/atl1_main.c with 57% similarity]
drivers/net/atlx/atl1.h [new file with mode: 0644]
drivers/net/atlx/atlx.c [new file with mode: 0644]
drivers/net/atlx/atlx.h [new file with mode: 0644]
drivers/net/bonding/bond_main.c
drivers/net/cassini.c
drivers/net/cxgb3/l2t.c
drivers/net/ixgbe/ixgbe.h
drivers/net/ixgbe/ixgbe_ethtool.c
drivers/net/ixgbe/ixgbe_main.c
drivers/net/niu.c
drivers/net/niu.h
drivers/net/s2io.c
drivers/net/s2io.h
drivers/net/sk98lin/Makefile [deleted file]
drivers/net/sk98lin/h/lm80.h [deleted file]
drivers/net/sk98lin/h/skaddr.h [deleted file]
drivers/net/sk98lin/h/skcsum.h [deleted file]
drivers/net/sk98lin/h/skdebug.h [deleted file]
drivers/net/sk98lin/h/skdrv1st.h [deleted file]
drivers/net/sk98lin/h/skdrv2nd.h [deleted file]
drivers/net/sk98lin/h/skerror.h [deleted file]
drivers/net/sk98lin/h/skgedrv.h [deleted file]
drivers/net/sk98lin/h/skgehw.h [deleted file]
drivers/net/sk98lin/h/skgehwt.h [deleted file]
drivers/net/sk98lin/h/skgei2c.h [deleted file]
drivers/net/sk98lin/h/skgeinit.h [deleted file]
drivers/net/sk98lin/h/skgepnm2.h [deleted file]
drivers/net/sk98lin/h/skgepnmi.h [deleted file]
drivers/net/sk98lin/h/skgesirq.h [deleted file]
drivers/net/sk98lin/h/ski2c.h [deleted file]
drivers/net/sk98lin/h/skqueue.h [deleted file]
drivers/net/sk98lin/h/skrlmt.h [deleted file]
drivers/net/sk98lin/h/sktimer.h [deleted file]
drivers/net/sk98lin/h/sktypes.h [deleted file]
drivers/net/sk98lin/h/skversion.h [deleted file]
drivers/net/sk98lin/h/skvpd.h [deleted file]
drivers/net/sk98lin/h/xmac_ii.h [deleted file]
drivers/net/sk98lin/skaddr.c [deleted file]
drivers/net/sk98lin/skdim.c [deleted file]
drivers/net/sk98lin/skethtool.c [deleted file]
drivers/net/sk98lin/skge.c [deleted file]
drivers/net/sk98lin/skgehwt.c [deleted file]
drivers/net/sk98lin/skgeinit.c [deleted file]
drivers/net/sk98lin/skgemib.c [deleted file]
drivers/net/sk98lin/skgepnmi.c [deleted file]
drivers/net/sk98lin/skgesirq.c [deleted file]
drivers/net/sk98lin/ski2c.c [deleted file]
drivers/net/sk98lin/sklm80.c [deleted file]
drivers/net/sk98lin/skqueue.c [deleted file]
drivers/net/sk98lin/skrlmt.c [deleted file]
drivers/net/sk98lin/sktimer.c [deleted file]
drivers/net/sk98lin/skvpd.c [deleted file]
drivers/net/sk98lin/skxmac2.c [deleted file]
drivers/net/smc91x.c
drivers/net/smc91x.h
drivers/net/tulip/Kconfig
drivers/net/tulip/Makefile
drivers/net/tulip/xircom_tulip_cb.c [deleted file]
drivers/net/via-velocity.c
drivers/net/wan/cosa.c
drivers/net/wireless/Kconfig
drivers/net/wireless/Makefile
drivers/net/wireless/adm8211.c
drivers/net/wireless/adm8211.h
drivers/net/wireless/ath5k/Kconfig [new file with mode: 0644]
drivers/net/wireless/ath5k/Makefile
drivers/net/wireless/ath5k/ath5k.h
drivers/net/wireless/ath5k/base.c
drivers/net/wireless/ath5k/base.h
drivers/net/wireless/ath5k/debug.c
drivers/net/wireless/ath5k/debug.h
drivers/net/wireless/ath5k/hw.c
drivers/net/wireless/ath5k/hw.h
drivers/net/wireless/ath5k/initvals.c
drivers/net/wireless/ath5k/phy.c
drivers/net/wireless/ath5k/reg.h
drivers/net/wireless/atmel.c
drivers/net/wireless/b43/b43.h
drivers/net/wireless/b43/dma.c
drivers/net/wireless/b43/dma.h
drivers/net/wireless/b43/main.c
drivers/net/wireless/b43/main.h
drivers/net/wireless/b43/sysfs.c
drivers/net/wireless/b43/wa.c
drivers/net/wireless/b43/xmit.c
drivers/net/wireless/b43/xmit.h
drivers/net/wireless/b43legacy/b43legacy.h
drivers/net/wireless/b43legacy/main.c
drivers/net/wireless/b43legacy/xmit.c
drivers/net/wireless/bcm43xx/Kconfig [deleted file]
drivers/net/wireless/bcm43xx/Makefile [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_debugfs.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_dma.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_dma.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_ethtool.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_ethtool.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_ilt.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_ilt.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_leds.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_leds.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_main.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_main.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_phy.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_phy.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_pio.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_pio.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_power.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_power.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_radio.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_radio.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_sysfs.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_sysfs.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_wx.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_wx.h [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_xmit.c [deleted file]
drivers/net/wireless/bcm43xx/bcm43xx_xmit.h [deleted file]
drivers/net/wireless/ipw2200.c
drivers/net/wireless/iwlwifi/Kconfig
drivers/net/wireless/iwlwifi/Makefile
drivers/net/wireless/iwlwifi/iwl-3945-commands.h
drivers/net/wireless/iwlwifi/iwl-3945-core.h [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-3945-debug.h
drivers/net/wireless/iwlwifi/iwl-3945-hw.h
drivers/net/wireless/iwlwifi/iwl-3945-io.h
drivers/net/wireless/iwlwifi/iwl-3945-rs.c
drivers/net/wireless/iwlwifi/iwl-3945-rs.h
drivers/net/wireless/iwlwifi/iwl-3945.c
drivers/net/wireless/iwlwifi/iwl-3945.h
drivers/net/wireless/iwlwifi/iwl-4965-commands.h
drivers/net/wireless/iwlwifi/iwl-4965-debug.h
drivers/net/wireless/iwlwifi/iwl-4965-hw.h
drivers/net/wireless/iwlwifi/iwl-4965-io.h
drivers/net/wireless/iwlwifi/iwl-4965-rs.c
drivers/net/wireless/iwlwifi/iwl-4965-rs.h
drivers/net/wireless/iwlwifi/iwl-4965.c
drivers/net/wireless/iwlwifi/iwl-4965.h
drivers/net/wireless/iwlwifi/iwl-core.c [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-core.h [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-csr.h [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-eeprom.c [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-eeprom.h [new file with mode: 0644]
drivers/net/wireless/iwlwifi/iwl-helpers.h
drivers/net/wireless/iwlwifi/iwl-prph.h
drivers/net/wireless/iwlwifi/iwl-spectrum.h
drivers/net/wireless/iwlwifi/iwl3945-base.c
drivers/net/wireless/iwlwifi/iwl4965-base.c
drivers/net/wireless/libertas/assoc.c
drivers/net/wireless/libertas/assoc.h
drivers/net/wireless/libertas/cmd.c
drivers/net/wireless/libertas/cmd.h
drivers/net/wireless/libertas/cmdresp.c
drivers/net/wireless/libertas/debugfs.c
drivers/net/wireless/libertas/dev.h
drivers/net/wireless/libertas/hostcmd.h
drivers/net/wireless/libertas/join.c
drivers/net/wireless/libertas/join.h
drivers/net/wireless/libertas/main.c
drivers/net/wireless/libertas/scan.c
drivers/net/wireless/libertas/scan.h
drivers/net/wireless/libertas/types.h
drivers/net/wireless/libertas/wext.c
drivers/net/wireless/p54.h
drivers/net/wireless/p54common.c
drivers/net/wireless/p54common.h
drivers/net/wireless/prism54/isl_ioctl.c
drivers/net/wireless/prism54/islpci_dev.c
drivers/net/wireless/prism54/islpci_dev.h
drivers/net/wireless/rndis_wlan.c
drivers/net/wireless/rt2x00/Kconfig
drivers/net/wireless/rt2x00/Makefile
drivers/net/wireless/rt2x00/rt2400pci.c
drivers/net/wireless/rt2x00/rt2400pci.h
drivers/net/wireless/rt2x00/rt2500pci.c
drivers/net/wireless/rt2x00/rt2500pci.h
drivers/net/wireless/rt2x00/rt2500usb.c
drivers/net/wireless/rt2x00/rt2500usb.h
drivers/net/wireless/rt2x00/rt2x00.h
drivers/net/wireless/rt2x00/rt2x00config.c
drivers/net/wireless/rt2x00/rt2x00debug.c
drivers/net/wireless/rt2x00/rt2x00debug.h
drivers/net/wireless/rt2x00/rt2x00dev.c
drivers/net/wireless/rt2x00/rt2x00dump.h
drivers/net/wireless/rt2x00/rt2x00firmware.c
drivers/net/wireless/rt2x00/rt2x00leds.c [new file with mode: 0644]
drivers/net/wireless/rt2x00/rt2x00leds.h [new file with mode: 0644]
drivers/net/wireless/rt2x00/rt2x00lib.h
drivers/net/wireless/rt2x00/rt2x00mac.c
drivers/net/wireless/rt2x00/rt2x00pci.c
drivers/net/wireless/rt2x00/rt2x00pci.h
drivers/net/wireless/rt2x00/rt2x00queue.c [new file with mode: 0644]
drivers/net/wireless/rt2x00/rt2x00queue.h [new file with mode: 0644]
drivers/net/wireless/rt2x00/rt2x00reg.h
drivers/net/wireless/rt2x00/rt2x00rfkill.c
drivers/net/wireless/rt2x00/rt2x00ring.h [deleted file]
drivers/net/wireless/rt2x00/rt2x00usb.c
drivers/net/wireless/rt2x00/rt2x00usb.h
drivers/net/wireless/rt2x00/rt61pci.c
drivers/net/wireless/rt2x00/rt61pci.h
drivers/net/wireless/rt2x00/rt73usb.c
drivers/net/wireless/rt2x00/rt73usb.h
drivers/net/wireless/rtl8180.h
drivers/net/wireless/rtl8180_dev.c
drivers/net/wireless/rtl8180_grf5101.c
drivers/net/wireless/rtl8180_max2820.c
drivers/net/wireless/rtl8180_rtl8225.c
drivers/net/wireless/rtl8180_sa2400.c
drivers/net/wireless/rtl8187.h
drivers/net/wireless/rtl8187_dev.c
drivers/net/wireless/rtl8187_rtl8225.c
drivers/net/wireless/rtl818x.h
drivers/net/wireless/strip.c
drivers/net/wireless/zd1211rw/zd_chip.c
drivers/net/wireless/zd1211rw/zd_chip.h
drivers/net/wireless/zd1211rw/zd_ieee80211.c
drivers/net/wireless/zd1211rw/zd_mac.c
drivers/net/wireless/zd1211rw/zd_mac.h
drivers/net/wireless/zd1211rw/zd_usb.c
drivers/s390/net/Kconfig
drivers/s390/net/Makefile
drivers/s390/net/ctcdbug.c [deleted file]
drivers/s390/net/ctcdbug.h [deleted file]
drivers/s390/net/ctcm_dbug.c [new file with mode: 0644]
drivers/s390/net/ctcm_dbug.h [new file with mode: 0644]
drivers/s390/net/ctcm_fsms.c [new file with mode: 0644]
drivers/s390/net/ctcm_fsms.h [new file with mode: 0644]
drivers/s390/net/ctcm_main.c [new file with mode: 0644]
drivers/s390/net/ctcm_main.h [new file with mode: 0644]
drivers/s390/net/ctcm_mpc.c [new file with mode: 0644]
drivers/s390/net/ctcm_mpc.h [new file with mode: 0644]
drivers/s390/net/ctcm_sysfs.c [new file with mode: 0644]
drivers/s390/net/ctcmain.c [deleted file]
drivers/s390/net/ctcmain.h [deleted file]
drivers/s390/net/qeth_core.h [moved from drivers/s390/net/qeth.h with 52% similarity]
drivers/s390/net/qeth_core_main.c [new file with mode: 0644]
drivers/s390/net/qeth_core_mpc.c [new file with mode: 0644]
drivers/s390/net/qeth_core_mpc.h [moved from drivers/s390/net/qeth_mpc.h with 78% similarity]
drivers/s390/net/qeth_core_offl.c [moved from drivers/s390/net/qeth_eddp.c with 67% similarity]
drivers/s390/net/qeth_core_offl.h [moved from drivers/s390/net/qeth_eddp.h with 55% similarity]
drivers/s390/net/qeth_core_sys.c [new file with mode: 0644]
drivers/s390/net/qeth_fs.h [deleted file]
drivers/s390/net/qeth_l2_main.c [new file with mode: 0644]
drivers/s390/net/qeth_l3.h [new file with mode: 0644]
drivers/s390/net/qeth_l3_main.c [new file with mode: 0644]
drivers/s390/net/qeth_l3_sys.c [new file with mode: 0644]
drivers/s390/net/qeth_main.c [deleted file]
drivers/s390/net/qeth_mpc.c [deleted file]
drivers/s390/net/qeth_proc.c [deleted file]
drivers/s390/net/qeth_sys.c [deleted file]
drivers/s390/net/qeth_tso.h [deleted file]
drivers/ssb/Kconfig
drivers/ssb/Makefile
drivers/ssb/driver_chipcommon.c
drivers/ssb/driver_gige.c [new file with mode: 0644]
drivers/ssb/driver_mipscore.c
drivers/ssb/driver_pcicore.c
drivers/ssb/embedded.c
drivers/ssb/main.c
drivers/ssb/pci.c
drivers/ssb/pcmcia.c
drivers/ssb/sprom.c [new file with mode: 0644]
drivers/ssb/ssb_private.h
include/linux/atalk.h
include/linux/icmpv6.h
include/linux/ieee80211.h
include/linux/if_arp.h
include/linux/igmp.h
include/linux/inetdevice.h
include/linux/net.h
include/linux/netdevice.h
include/linux/nl80211.h
include/linux/skbuff.h
include/linux/smc91x.h [new file with mode: 0644]
include/linux/ssb/ssb.h
include/linux/ssb/ssb_driver_chipcommon.h
include/linux/ssb/ssb_driver_gige.h [new file with mode: 0644]
include/linux/ssb/ssb_driver_pci.h
include/linux/tcp.h
include/linux/udp.h
include/linux/wireless.h
include/linux/xfrm.h
include/net/addrconf.h
include/net/cfg80211.h
include/net/icmp.h
include/net/ieee80211.h
include/net/ieee80211softmac.h [deleted file]
include/net/ieee80211softmac_wx.h [deleted file]
include/net/inet_hashtables.h
include/net/inet_sock.h
include/net/ip6_fib.h
include/net/ip6_route.h
include/net/ipv6.h
include/net/llc_if.h
include/net/mac80211.h
include/net/ndisc.h
include/net/neighbour.h
include/net/netns/ipv4.h
include/net/netns/ipv6.h
include/net/raw.h
include/net/request_sock.h
include/net/route.h
include/net/sctp/sctp.h
include/net/sctp/structs.h
include/net/sock.h
include/net/tcp.h
include/net/tipc/tipc_bearer.h
include/net/tipc/tipc_port.h
include/net/udp.h
include/net/wireless.h
include/net/xfrm.h
net/8021q/vlan_dev.c
net/8021q/vlanproc.c
net/9p/error.c
net/Kconfig
net/appletalk/aarp.c
net/atm/clip.c
net/atm/lec.c
net/atm/proc.c
net/bridge/br_netfilter.c
net/bridge/br_sysfs_br.c
net/core/dev.c
net/core/dev_mcast.c
net/core/dst.c
net/core/neighbour.c
net/core/netpoll.c
net/core/sock.c
net/dccp/dccp.h
net/dccp/ipv4.c
net/dccp/ipv6.c
net/dccp/minisocks.c
net/decnet/af_decnet.c
net/ieee80211/Kconfig
net/ieee80211/Makefile
net/ieee80211/softmac/Kconfig [deleted file]
net/ieee80211/softmac/Makefile [deleted file]
net/ieee80211/softmac/ieee80211softmac_assoc.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_auth.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_event.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_io.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_module.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_priv.h [deleted file]
net/ieee80211/softmac/ieee80211softmac_scan.c [deleted file]
net/ieee80211/softmac/ieee80211softmac_wx.c [deleted file]
net/ipv4/af_inet.c
net/ipv4/arp.c
net/ipv4/cipso_ipv4.c
net/ipv4/devinet.c
net/ipv4/fib_trie.c
net/ipv4/icmp.c
net/ipv4/igmp.c
net/ipv4/inet_connection_sock.c
net/ipv4/inet_hashtables.c
net/ipv4/inet_timewait_sock.c
net/ipv4/ip_forward.c
net/ipv4/ip_gre.c
net/ipv4/ip_input.c
net/ipv4/ip_options.c
net/ipv4/ip_output.c
net/ipv4/ip_sockglue.c
net/ipv4/ipconfig.c
net/ipv4/ipip.c
net/ipv4/ipmr.c
net/ipv4/ipvs/ip_vs_proto_tcp.c
net/ipv4/ipvs/ip_vs_proto_udp.c
net/ipv4/ipvs/ip_vs_sync.c
net/ipv4/netfilter/arp_tables.c
net/ipv4/netfilter/ip_tables.c
net/ipv4/netfilter/ipt_MASQUERADE.c
net/ipv4/netfilter/nf_conntrack_l3proto_ipv4_compat.c
net/ipv4/netfilter/nf_nat_helper.c
net/ipv4/raw.c
net/ipv4/route.c
net/ipv4/syncookies.c
net/ipv4/tcp.c
net/ipv4/tcp_cubic.c
net/ipv4/tcp_input.c
net/ipv4/tcp_ipv4.c
net/ipv4/tcp_minisocks.c
net/ipv4/tcp_output.c
net/ipv4/tcp_timer.c
net/ipv4/udp.c
net/ipv4/udp_impl.h
net/ipv4/udplite.c
net/ipv6/Makefile
net/ipv6/addrconf.c
net/ipv6/addrlabel.c
net/ipv6/af_inet6.c
net/ipv6/anycast.c
net/ipv6/fib6_rules.c
net/ipv6/icmp.c
net/ipv6/inet6_hashtables.c
net/ipv6/ip6_fib.c
net/ipv6/ip6_input.c
net/ipv6/ip6_output.c
net/ipv6/ip6_tunnel.c
net/ipv6/ipv6_sockglue.c
net/ipv6/mcast.c
net/ipv6/mip6.c
net/ipv6/ndisc.c
net/ipv6/netfilter.c
net/ipv6/netfilter/ip6_tables.c
net/ipv6/netfilter/ip6t_REJECT.c
net/ipv6/proc.c
net/ipv6/raw.c
net/ipv6/route.c
net/ipv6/sit.c
net/ipv6/syncookies.c [new file with mode: 0644]
net/ipv6/sysctl_net_ipv6.c
net/ipv6/tcp_ipv6.c
net/ipv6/udp.c
net/ipv6/udp_impl.h
net/ipv6/udplite.c
net/ipv6/xfrm6_policy.c
net/irda/af_irda.c
net/irda/discovery.c
net/irda/ircomm/ircomm_core.c
net/irda/ircomm/ircomm_event.c
net/irda/ircomm/ircomm_lmp.c
net/irda/ircomm/ircomm_param.c
net/irda/ircomm/ircomm_ttp.c
net/irda/ircomm/ircomm_tty.c
net/irda/ircomm/ircomm_tty_attach.c
net/irda/ircomm/ircomm_tty_ioctl.c
net/irda/irda_device.c
net/irda/iriap.c
net/irda/iriap_event.c
net/irda/irias_object.c
net/irda/irlan/irlan_client.c
net/irda/irlan/irlan_client_event.c
net/irda/irlan/irlan_common.c
net/irda/irlan/irlan_eth.c
net/irda/irlan/irlan_event.c
net/irda/irlan/irlan_filter.c
net/irda/irlan/irlan_provider.c
net/irda/irlan/irlan_provider_event.c
net/irda/irlap.c
net/irda/irlap_event.c
net/irda/irlap_frame.c
net/irda/irlmp.c
net/irda/irlmp_event.c
net/irda/irlmp_frame.c
net/irda/irmod.c
net/irda/irnet/irnet.h
net/irda/irnetlink.c
net/irda/irqueue.c
net/irda/irttp.c
net/irda/parameters.c
net/irda/qos.c
net/irda/wrapper.c
net/key/af_key.c
net/llc/af_llc.c
net/llc/llc_c_ac.c
net/llc/llc_c_ev.c
net/llc/llc_conn.c
net/llc/llc_input.c
net/mac80211/Kconfig
net/mac80211/Makefile
net/mac80211/cfg.c
net/mac80211/debugfs.c
net/mac80211/debugfs_netdev.c
net/mac80211/debugfs_sta.c
net/mac80211/debugfs_sta.h
net/mac80211/ieee80211.c
net/mac80211/ieee80211_i.h
net/mac80211/ieee80211_iface.c
net/mac80211/ieee80211_ioctl.c
net/mac80211/ieee80211_key.h
net/mac80211/ieee80211_rate.c
net/mac80211/ieee80211_rate.h
net/mac80211/ieee80211_sta.c
net/mac80211/key.c
net/mac80211/mesh.c [new file with mode: 0644]
net/mac80211/mesh.h [new file with mode: 0644]
net/mac80211/mesh_hwmp.c [new file with mode: 0644]
net/mac80211/mesh_pathtbl.c [new file with mode: 0644]
net/mac80211/mesh_plink.c [new file with mode: 0644]
net/mac80211/rc80211_pid_algo.c
net/mac80211/rc80211_simple.c [deleted file]
net/mac80211/regdomain.c [deleted file]
net/mac80211/rx.c
net/mac80211/sta_info.c
net/mac80211/sta_info.h
net/mac80211/tx.c
net/mac80211/util.c
net/mac80211/wep.c
net/mac80211/wep.h
net/mac80211/wme.c
net/mac80211/wme.h
net/mac80211/wpa.c
net/mac80211/wpa.h
net/netfilter/nf_conntrack_netbios_ns.c
net/netfilter/nf_conntrack_standalone.c
net/netlink/af_netlink.c
net/packet/af_packet.c
net/rxrpc/ar-internal.h
net/rxrpc/ar-proc.c
net/sched/em_meta.c
net/sctp/associola.c
net/sctp/chunk.c
net/sctp/input.c
net/sctp/ipv6.c
net/sctp/output.c
net/sctp/outqueue.c
net/sctp/proc.c
net/sctp/protocol.c
net/sctp/sm_make_chunk.c
net/sctp/sm_sideeffect.c
net/sctp/sm_statefuns.c
net/sctp/socket.c
net/sctp/transport.c
net/sunrpc/auth_gss/auth_gss.c
net/sunrpc/clnt.c
net/sunrpc/rpc_pipe.c
net/sunrpc/rpcb_clnt.c
net/sunrpc/xprtsock.c
net/tipc/core.c
net/tipc/core.h
net/tipc/link.c
net/tipc/msg.c
net/tipc/msg.h
net/tipc/port.c
net/tipc/socket.c
net/unix/af_unix.c
net/wireless/Makefile
net/wireless/core.c
net/wireless/core.h
net/wireless/nl80211.c
net/wireless/reg.c [new file with mode: 0644]
net/wireless/util.c [new file with mode: 0644]
net/xfrm/xfrm_policy.c
net/xfrm/xfrm_state.c
net/xfrm/xfrm_user.c

index 300e170..9ebd1f0 100644 (file)
@@ -11,7 +11,8 @@ DOCBOOKS := wanbook.xml z8530book.xml mcabook.xml videobook.xml \
            procfs-guide.xml writing_usb_driver.xml networking.xml \
            kernel-api.xml filesystems.xml lsm.xml usb.xml \
            gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \
-           genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml
+           genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \
+           mac80211.xml
 
 ###
 # The build process is as follows (targets):
diff --git a/Documentation/DocBook/mac80211.tmpl b/Documentation/DocBook/mac80211.tmpl
new file mode 100644 (file)
index 0000000..b651e0a
--- /dev/null
@@ -0,0 +1,335 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
+       "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
+
+<book id="mac80211-developers-guide">
+  <bookinfo>
+    <title>The mac80211 subsystem for kernel developers</title>
+
+    <authorgroup>
+      <author>
+        <firstname>Johannes</firstname>
+        <surname>Berg</surname>
+        <affiliation>
+          <address><email>johannes@sipsolutions.net</email></address>
+        </affiliation>
+      </author>
+    </authorgroup>
+
+    <copyright>
+      <year>2007</year>
+      <year>2008</year>
+      <holder>Johannes Berg</holder>
+    </copyright>
+
+    <legalnotice>
+      <para>
+        This documentation is free software; you can redistribute
+        it and/or modify it under the terms of the GNU General Public
+        License version 2 as published by the Free Software Foundation.
+      </para>
+
+      <para>
+        This documentation is distributed in the hope that it will be
+        useful, but WITHOUT ANY WARRANTY; without even the implied
+        warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+        See the GNU General Public License for more details.
+      </para>
+
+      <para>
+        You should have received a copy of the GNU General Public
+        License along with this documentation; if not, write to the Free
+        Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+        MA 02111-1307 USA
+      </para>
+
+      <para>
+        For more details see the file COPYING in the source
+        distribution of Linux.
+      </para>
+    </legalnotice>
+
+    <abstract>
+!Pinclude/net/mac80211.h Introduction
+!Pinclude/net/mac80211.h Warning
+    </abstract>
+  </bookinfo>
+
+  <toc></toc>
+
+<!--
+Generally, this document shall be ordered by increasing complexity.
+It is important to note that readers should be able to read only
+the first few sections to get a working driver and only advanced
+usage should require reading the full document.
+-->
+
+  <part>
+    <title>The basic mac80211 driver interface</title>
+    <partintro>
+      <para>
+        You should read and understand the information contained
+        within this part of the book while implementing a driver.
+        In some chapters, advanced usage is noted, that may be
+        skipped at first.
+      </para>
+      <para>
+        This part of the book only covers station and monitor mode
+        functionality, additional information required to implement
+        the other modes is covered in the second part of the book.
+      </para>
+    </partintro>
+
+    <chapter id="basics">
+      <title>Basic hardware handling</title>
+      <para>TBD</para>
+      <para>
+        This chapter shall contain information on getting a hw
+        struct allocated and registered with mac80211.
+      </para>
+      <para>
+        Since it is required to allocate rates/modes before registering
+        a hw struct, this chapter shall also contain information on setting
+        up the rate/mode structs.
+      </para>
+      <para>
+        Additionally, some discussion about the callbacks and
+        the general programming model should be in here, including
+        the definition of ieee80211_ops which will be referred to
+        a lot.
+      </para>
+      <para>
+        Finally, a discussion of hardware capabilities should be done
+        with references to other parts of the book.
+      </para>
+<!-- intentionally multiple !F lines to get proper order -->
+!Finclude/net/mac80211.h ieee80211_hw
+!Finclude/net/mac80211.h ieee80211_hw_flags
+!Finclude/net/mac80211.h SET_IEEE80211_DEV
+!Finclude/net/mac80211.h SET_IEEE80211_PERM_ADDR
+!Finclude/net/mac80211.h ieee80211_ops
+!Finclude/net/mac80211.h ieee80211_alloc_hw
+!Finclude/net/mac80211.h ieee80211_register_hw
+!Finclude/net/mac80211.h ieee80211_get_tx_led_name
+!Finclude/net/mac80211.h ieee80211_get_rx_led_name
+!Finclude/net/mac80211.h ieee80211_get_assoc_led_name
+!Finclude/net/mac80211.h ieee80211_get_radio_led_name
+!Finclude/net/mac80211.h ieee80211_unregister_hw
+!Finclude/net/mac80211.h ieee80211_free_hw
+    </chapter>
+
+    <chapter id="phy-handling">
+      <title>PHY configuration</title>
+      <para>TBD</para>
+      <para>
+        This chapter should describe PHY handling including
+        start/stop callbacks and the various structures used.
+      </para>
+!Finclude/net/mac80211.h ieee80211_conf
+!Finclude/net/mac80211.h ieee80211_conf_flags
+    </chapter>
+
+    <chapter id="iface-handling">
+      <title>Virtual interfaces</title>
+      <para>TBD</para>
+      <para>
+        This chapter should describe virtual interface basics
+        that are relevant to the driver (VLANs, MGMT etc are not.)
+        It should explain the use of the add_iface/remove_iface
+        callbacks as well as the interface configuration callbacks.
+      </para>
+      <para>Things related to AP mode should be discussed there.</para>
+      <para>
+        Things related to supporting multiple interfaces should be
+        in the appropriate chapter, a BIG FAT note should be here about
+        this though and the recommendation to allow only a single
+        interface in STA mode at first!
+      </para>
+!Finclude/net/mac80211.h ieee80211_if_types
+!Finclude/net/mac80211.h ieee80211_if_init_conf
+!Finclude/net/mac80211.h ieee80211_if_conf
+    </chapter>
+
+    <chapter id="rx-tx">
+      <title>Receive and transmit processing</title>
+      <sect1>
+        <title>what should be here</title>
+        <para>TBD</para>
+        <para>
+          This should describe the receive and transmit
+          paths in mac80211/the drivers as well as
+          transmit status handling.
+        </para>
+      </sect1>
+      <sect1>
+        <title>Frame format</title>
+!Pinclude/net/mac80211.h Frame format
+      </sect1>
+      <sect1>
+        <title>Alignment issues</title>
+        <para>TBD</para>
+      </sect1>
+      <sect1>
+        <title>Calling into mac80211 from interrupts</title>
+!Pinclude/net/mac80211.h Calling mac80211 from interrupts
+      </sect1>
+      <sect1>
+        <title>functions/definitions</title>
+!Finclude/net/mac80211.h ieee80211_rx_status
+!Finclude/net/mac80211.h mac80211_rx_flags
+!Finclude/net/mac80211.h ieee80211_tx_control
+!Finclude/net/mac80211.h ieee80211_tx_status_flags
+!Finclude/net/mac80211.h ieee80211_rx
+!Finclude/net/mac80211.h ieee80211_rx_irqsafe
+!Finclude/net/mac80211.h ieee80211_tx_status
+!Finclude/net/mac80211.h ieee80211_tx_status_irqsafe
+!Finclude/net/mac80211.h ieee80211_rts_get
+!Finclude/net/mac80211.h ieee80211_rts_duration
+!Finclude/net/mac80211.h ieee80211_ctstoself_get
+!Finclude/net/mac80211.h ieee80211_ctstoself_duration
+!Finclude/net/mac80211.h ieee80211_generic_frame_duration
+!Finclude/net/mac80211.h ieee80211_get_hdrlen_from_skb
+!Finclude/net/mac80211.h ieee80211_get_hdrlen
+!Finclude/net/mac80211.h ieee80211_wake_queue
+!Finclude/net/mac80211.h ieee80211_stop_queue
+!Finclude/net/mac80211.h ieee80211_start_queues
+!Finclude/net/mac80211.h ieee80211_stop_queues
+!Finclude/net/mac80211.h ieee80211_wake_queues
+      </sect1>
+    </chapter>
+
+    <chapter id="filters">
+      <title>Frame filtering</title>
+!Pinclude/net/mac80211.h Frame filtering
+!Finclude/net/mac80211.h ieee80211_filter_flags
+    </chapter>
+  </part>
+
+  <part id="advanced">
+    <title>Advanced driver interface</title>
+    <partintro>
+      <para>
+       Information contained within this part of the book is
+       of interest only for advanced interaction of mac80211
+       with drivers to exploit more hardware capabilities and
+       improve performance.
+      </para>
+    </partintro>
+
+    <chapter id="hardware-crypto-offload">
+      <title>Hardware crypto acceleration</title>
+!Pinclude/net/mac80211.h Hardware crypto acceleration
+<!-- intentionally multiple !F lines to get proper order -->
+!Finclude/net/mac80211.h set_key_cmd
+!Finclude/net/mac80211.h ieee80211_key_conf
+!Finclude/net/mac80211.h ieee80211_key_alg
+!Finclude/net/mac80211.h ieee80211_key_flags
+    </chapter>
+
+    <chapter id="qos">
+      <title>Multiple queues and QoS support</title>
+      <para>TBD</para>
+!Finclude/net/mac80211.h ieee80211_tx_queue_params
+!Finclude/net/mac80211.h ieee80211_tx_queue_stats_data
+!Finclude/net/mac80211.h ieee80211_tx_queue
+    </chapter>
+
+    <chapter id="AP">
+      <title>Access point mode support</title>
+      <para>TBD</para>
+      <para>Some parts of the if_conf should be discussed here instead</para>
+      <para>
+        Insert notes about VLAN interfaces with hw crypto here or
+        in the hw crypto chapter.
+      </para>
+!Finclude/net/mac80211.h ieee80211_get_buffered_bc
+!Finclude/net/mac80211.h ieee80211_beacon_get
+    </chapter>
+
+    <chapter id="multi-iface">
+      <title>Supporting multiple virtual interfaces</title>
+      <para>TBD</para>
+      <para>
+        Note: WDS with identical MAC address should almost always be OK
+      </para>
+      <para>
+        Insert notes about having multiple virtual interfaces with
+        different MAC addresses here, note which configurations are
+        supported by mac80211, add notes about supporting hw crypto
+        with it.
+      </para>
+    </chapter>
+
+    <chapter id="hardware-scan-offload">
+      <title>Hardware scan offload</title>
+      <para>TBD</para>
+!Finclude/net/mac80211.h ieee80211_scan_completed
+    </chapter>
+  </part>
+
+  <part id="rate-control">
+    <title>Rate control interface</title>
+    <partintro>
+      <para>TBD</para>
+      <para>
+       This part of the book describes the rate control algorithm
+       interface and how it relates to mac80211 and drivers.
+      </para>
+    </partintro>
+    <chapter id="dummy">
+      <title>dummy chapter</title>
+      <para>TBD</para>
+    </chapter>
+  </part>
+
+  <part id="internal">
+    <title>Internals</title>
+    <partintro>
+      <para>TBD</para>
+      <para>
+       This part of the book describes mac80211 internals.
+      </para>
+    </partintro>
+
+    <chapter id="key-handling">
+      <title>Key handling</title>
+      <sect1>
+        <title>Key handling basics</title>
+!Pnet/mac80211/key.c Key handling basics
+      </sect1>
+      <sect1>
+        <title>MORE TBD</title>
+        <para>TBD</para>
+      </sect1>
+    </chapter>
+
+    <chapter id="rx-processing">
+      <title>Receive processing</title>
+      <para>TBD</para>
+    </chapter>
+
+    <chapter id="tx-processing">
+      <title>Transmit processing</title>
+      <para>TBD</para>
+    </chapter>
+
+    <chapter id="sta-info">
+      <title>Station info handling</title>
+      <sect1>
+        <title>Programming information</title>
+!Fnet/mac80211/sta_info.h sta_info
+!Fnet/mac80211/sta_info.h ieee80211_sta_info_flags
+      </sect1>
+      <sect1>
+        <title>STA information lifetime rules</title>
+!Pnet/mac80211/sta_info.c STA information lifetime rules
+      </sect1>
+    </chapter>
+
+    <chapter id="synchronisation">
+      <title>Synchronisation</title>
+      <para>TBD</para>
+      <para>Locking, lots of RCU</para>
+    </chapter>
+  </part>
+</book>
index c1d1fd0..1d171fe 100644 (file)
@@ -213,14 +213,6 @@ Who:  linuxppc-dev@ozlabs.org
 
 ---------------------------
 
-What:   sk98lin network driver
-When:   Feburary 2008
-Why:    In kernel tree version of driver is unmaintained. Sk98lin driver
-       replaced by the skge driver. 
-Who:    Stephen Hemminger <shemminger@linux-foundation.org>
-
----------------------------
-
 What:  i386/x86_64 bzImage symlinks
 When:  April 2008
 
@@ -231,8 +223,6 @@ Who:        Thomas Gleixner <tglx@linutronix.de>
 
 ---------------------------
 
----------------------------
-
 What:  i2c-i810, i2c-prosavage and i2c-savage4
 When:  May 2008
 Why:   These drivers are superseded by i810fb, intelfb and savagefb.
@@ -240,33 +230,6 @@ Who:       Jean Delvare <khali@linux-fr.org>
 
 ---------------------------
 
-What:  bcm43xx wireless network driver
-When:  2.6.26
-Files: drivers/net/wireless/bcm43xx
-Why:   This driver's functionality has been replaced by the
-       mac80211-based b43 and b43legacy drivers.
-Who:   John W. Linville <linville@tuxdriver.com>
-
----------------------------
-
-What:  ieee80211 softmac wireless networking component
-When:  2.6.26 (or after removal of bcm43xx and port of zd1211rw to mac80211)
-Files: net/ieee80211/softmac
-Why:   No in-kernel drivers will depend on it any longer.
-Who:   John W. Linville <linville@tuxdriver.com>
-
----------------------------
-
-What:  rc80211-simple rate control algorithm for mac80211
-When:  2.6.26
-Files: net/mac80211/rc80211-simple.c
-Why:   This algorithm was provided for reference but always exhibited bad
-       responsiveness and performance and has some serious flaws. It has been
-       replaced by rc80211-pid.
-Who:   Stefano Brivio <stefano.brivio@polimi.it>
-
----------------------------
-
 What (Why):
        - include/linux/netfilter_ipv4/ipt_TOS.h ipt_tos.h header files
          (superseded by xt_TOS/xt_tos target & match)
index 23df051..79b7dbd 100644 (file)
@@ -80,7 +80,7 @@ once you enable the radio, will depend on your hardware and driver combination.
 e.g. With the BCM4318 on the Acer Aspire 5020 series:
 
 ndiswrapper: Light blinks on when transmitting
-bcm43xx/b43: Solid light, blinks off when transmitting
+b43: Solid light, blinks off when transmitting
 
 Wireless radio control is unconditionally enabled - all Acer laptops that support
 acer-wmi come with built-in wireless. However, should you feel so inclined to
diff --git a/Documentation/networking/bcm43xx.txt b/Documentation/networking/bcm43xx.txt
deleted file mode 100644 (file)
index d602c8d..0000000
+++ /dev/null
@@ -1,89 +0,0 @@
-
-                       BCM43xx Linux Driver Project
-                       ============================
-
-Introduction
-------------
-
-Many of the wireless devices found in modern notebook computers are
-based on the wireless chips produced by Broadcom. These devices have
-been a problem for Linux users as there is no open-source driver
-available. In addition, Broadcom has not released specifications
-for the device, and driver availability has been limited to the
-binary-only form used in the GPL versions of AP hardware such as the
-Linksys WRT54G, and the Windows and OS X drivers.  Before this project
-began, the only way to use these devices were to use the Windows or
-OS X drivers with either the Linuxant or ndiswrapper modules. There
-is a strong penalty if this method is used as loading the binary-only
-module "taints" the kernel, and no kernel developer will help diagnose
-any kernel problems.
-
-Development
------------
-
-This driver has been developed using
-a clean-room technique that is described at
-http://bcm-specs.sipsolutions.net/ReverseEngineeringProcess. For legal
-reasons, none of the clean-room crew works on the on the Linux driver,
-and none of the Linux developers sees anything but the specifications,
-which are the ultimate product of the reverse-engineering group.
-
-Software
---------
-
-Since the release of the 2.6.17 kernel, the bcm43xx driver has been
-distributed with the kernel source, and is prebuilt in most, if not
-all, distributions.  There is, however, additional software that is
-required. The firmware used by the chip is the intellectual property
-of Broadcom and they have not given the bcm43xx team redistribution
-rights to this firmware.  Since we cannot legally redistribute
-the firmware we cannot include it with the driver. Furthermore, it
-cannot be placed in the downloadable archives of any distributing
-organization; therefore, the user is responsible for obtaining the
-firmware and placing it in the appropriate location so that the driver
-can find it when initializing.
-
-To help with this process, the bcm43xx developers provide a separate
-program named bcm43xx-fwcutter to "cut" the firmware out of a
-Windows or OS X driver and write the extracted files to the proper
-location. This program is usually provided with the distribution;
-however, it may be downloaded from
-
-http://developer.berlios.de/project/showfiles.php?group_id=4547
-
-The firmware is available in two versions. V3 firmware is used with
-the in-kernel bcm43xx driver that uses a software MAC layer called
-SoftMAC, and will have a microcode revision of 0x127 or smaller. The
-V4 firmware is used by an out-of-kernel driver employing a variation of
-the Devicescape MAC layer known as d80211. Once bcm43xx-d80211 reaches
-a satisfactory level of development, it will replace bcm43xx-softmac
-in the kernel as it is much more flexible and powerful.
-
-A source for the latest V3 firmware is
-
-http://downloads.openwrt.org/sources/wl_apsta-3.130.20.0.o
-
-Once this file is downloaded, the command
-'bcm43xx-fwcutter -w <dir> <filename>'
-will extract the microcode and write it to directory
-<dir>. The correct directory will depend on your distribution;
-however, most use '/lib/firmware'. Once this step is completed,
-the bcm3xx driver should load when the system is booted. To see
-any messages relating to the driver, issue the command 'dmesg |
-grep bcm43xx' from a terminal window. If there are any problems,
-please send that output to Bcm43xx-dev@lists.berlios.de.
-
-Although the driver has been in-kernel since 2.6.17, the earliest
-version is quite limited in its capability. Patches that include
-all features of later versions are available for the stable kernel
-versions from 2.6.18. These will be needed if you use a BCM4318,
-or a PCI Express version (BCM4311 and BCM4312). In addition, if you
-have an early BCM4306 and more than 1 GB RAM, your kernel will need
-to be patched. These patches, which are being updated regularly,
-are available at ftp://lwfinger.dynalias.org/patches. Look for
-combined_2.6.YY.patch. Of course you will need kernel source downloaded
-from kernel.org, or the source from your distribution.
-
-If you build your own kernel, please enable CONFIG_BCM43XX_DEBUG
-and CONFIG_IEEE80211_SOFTMAC_DEBUG. The log information provided is
-essential for solving any problems.
index 76843d0..27a1706 100644 (file)
@@ -834,15 +834,6 @@ L: linux-wireless@vger.kernel.org
 W:     http://linuxwireless.org/en/users/Drivers/b43
 S:     Maintained
 
-BCM43XX WIRELESS DRIVER (SOFTMAC BASED VERSION)
-P:     Larry Finger
-M:     Larry.Finger@lwfinger.net
-P:     Stefano Brivio
-M:     stefano.brivio@polimi.it
-L:     linux-wireless@vger.kernel.org
-W:     http://bcm43xx.berlios.de/
-S:     Obsolete
-
 BEFS FILE SYSTEM
 P:     Sergey S. Kostyliov
 M:     rathamahata@php4.ru
@@ -3592,12 +3583,6 @@ M:       mhoffman@lightlink.com
 L:     lm-sensors@lm-sensors.org
 S:     Maintained
 
-SOFTMAC LAYER (IEEE 802.11)
-P:     Daniel Drake
-M:     dsd@gentoo.org
-L:     linux-wireless@vger.kernel.org
-S:     Obsolete
-
 SOFTWARE RAID (Multiple Disks) SUPPORT
 P:     Ingo Molnar
 M:     mingo@redhat.com
index 62f6b5a..cb93bf2 100644 (file)
@@ -537,11 +537,9 @@ CONFIG_CTC=m
 # CONFIG_SMSGIUCV is not set
 # CONFIG_CLAW is not set
 CONFIG_QETH=y
-
-#
-# Gigabit Ethernet default settings
-#
-# CONFIG_QETH_IPV6 is not set
+CONFIG_QETH_L2=y
+CONFIG_QETH_L3=y
+CONFIG_QETH_IPV6=y
 CONFIG_CCWGROUP=y
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
index a828076..a499e86 100644 (file)
@@ -48,14 +48,16 @@ EXPORT_SYMBOL(__alloc_ei_netdev);
 
 #if defined(MODULE)
 
-int init_module(void)
+static int __init ns8390_module_init(void)
 {
        return 0;
 }
 
-void cleanup_module(void)
+static void __exit ns8390_module_exit(void)
 {
 }
 
+module_init(ns8390_module_init);
+module_exit(ns8390_module_exit);
 #endif /* MODULE */
 MODULE_LICENSE("GPL");
index fe7b5ec..978e72a 100644 (file)
@@ -2220,93 +2220,6 @@ config SKY2_DEBUG
 
         If unsure, say N.
 
-config SK98LIN
-       tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support (DEPRECATED)"
-       depends on PCI
-       ---help---
-         Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
-         compliant Gigabit Ethernet Adapter.
-
-         This driver supports the original Yukon chipset. This driver is
-         deprecated and will be removed from the kernel in the near future,
-         it has been replaced by the skge driver. skge is cleaner and
-         seems to work better.
-
-         This driver does not support the newer Yukon2 chipset. A separate
-         driver, sky2, is provided to support Yukon2-based adapters.
-
-         The following adapters are supported by this driver:
-           - 3Com 3C940 Gigabit LOM Ethernet Adapter
-           - 3Com 3C941 Gigabit LOM Ethernet Adapter
-           - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
-           - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
-           - Belkin Gigabit Desktop Card 10/100/1000Base-T Adapter, Copper RJ-45
-           - EG1032 v2 Instant Gigabit Network Adapter
-           - EG1064 v2 Instant Gigabit Network Adapter
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Abit)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Albatron)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Asus)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (ECS)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Epox)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Foxconn)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Gigabyte)
-           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Iwill)
-           - Marvell 88E8050 Gigabit LOM Ethernet Adapter (Intel)
-           - Marvell RDK-8001 Adapter
-           - Marvell RDK-8002 Adapter
-           - Marvell RDK-8003 Adapter
-           - Marvell RDK-8004 Adapter
-           - Marvell RDK-8006 Adapter
-           - Marvell RDK-8007 Adapter
-           - Marvell RDK-8008 Adapter
-           - Marvell RDK-8009 Adapter
-           - Marvell RDK-8010 Adapter
-           - Marvell RDK-8011 Adapter
-           - Marvell RDK-8012 Adapter
-           - Marvell RDK-8052 Adapter
-           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (32 bit)
-           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (64 bit)
-           - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
-           - SK-9521 10/100/1000Base-T Adapter
-           - SK-9521 V2.0 10/100/1000Base-T Adapter
-           - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
-           - SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
-           - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
-           - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
-           - SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
-           - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
-           - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
-           - SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
-           - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
-           - SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
-           - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
-           - SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
-           - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
-           - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
-           - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
-           - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
-           - SMC EZ Card 1000 (SMC9452TXV.2)
-         
-         The adapters support Jumbo Frames.
-         The dual link adapters support link-failover and dual port features.
-         Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support 
-         the scatter-gather functionality with sendfile(). Please refer to 
-         <file:Documentation/networking/sk98lin.txt> for more information about
-         optional driver parameters.
-         Questions concerning this driver may be addressed to:
-             <linux@syskonnect.de>
-         
-         If you want to compile this driver as a module ( = code which can be
-         inserted in and removed from the running kernel whenever you want),
-         say M here and read <file:Documentation/kbuild/modules.txt>. The module will
-         be called sk98lin. This is recommended.
-
 config VIA_VELOCITY
        tristate "VIA Velocity support"
        depends on PCI
index 3b1ea32..960999c 100644 (file)
@@ -15,7 +15,7 @@ obj-$(CONFIG_CHELSIO_T3) += cxgb3/
 obj-$(CONFIG_EHEA) += ehea/
 obj-$(CONFIG_CAN) += can/
 obj-$(CONFIG_BONDING) += bonding/
-obj-$(CONFIG_ATL1) += atl1/
+obj-$(CONFIG_ATL1) += atlx/
 obj-$(CONFIG_GIANFAR) += gianfar_driver.o
 obj-$(CONFIG_TEHUTI) += tehuti.o
 
@@ -75,7 +75,6 @@ ps3_gelic-objs += ps3_gelic_net.o $(gelic_wireless-y)
 obj-$(CONFIG_TC35815) += tc35815.o
 obj-$(CONFIG_SKGE) += skge.o
 obj-$(CONFIG_SKY2) += sky2.o
-obj-$(CONFIG_SK98LIN) += sk98lin/
 obj-$(CONFIG_SKFP) += skfp/
 obj-$(CONFIG_VIA_RHINE) += via-rhine.o
 obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
index 92c3a4c..65b901e 100644 (file)
@@ -1010,7 +1010,7 @@ module_param(io, int, 0);
 module_param(irq, int, 0);
 module_param(board_type, int, 0);
 
-int __init init_module(void)
+static int __init cops_module_init(void)
 {
        if (io == 0)
                printk(KERN_WARNING "%s: You shouldn't autoprobe with insmod\n",
@@ -1021,12 +1021,14 @@ int __init init_module(void)
         return 0;
 }
 
-void __exit cleanup_module(void)
+static void __exit cops_module_exit(void)
 {
        unregister_netdev(cops_dev);
        cleanup_card(cops_dev);
        free_netdev(cops_dev);
 }
+module_init(cops_module_init);
+module_exit(cops_module_exit);
 #endif /* MODULE */
 
 /*
index 7cf0a25..8b51313 100644 (file)
@@ -348,14 +348,15 @@ MODULE_LICENSE("GPL");
 
 #ifdef MODULE
 
-int init_module(void)
+static int __init com20020_module_init(void)
 {
        BUGLVL(D_NORMAL) printk(VERSION);
        return 0;
 }
 
-void cleanup_module(void)
+static void __exit com20020_module_exit(void)
 {
 }
-
+module_init(com20020_module_init);
+module_exit(com20020_module_exit);
 #endif                         /* MODULE */
index 24d81f9..7e874d4 100644 (file)
@@ -881,7 +881,7 @@ MODULE_PARM_DESC(io, "AT1700/FMV18X I/O base address");
 MODULE_PARM_DESC(irq, "AT1700/FMV18X IRQ number");
 MODULE_PARM_DESC(net_debug, "AT1700/FMV18X debug level (0-6)");
 
-int __init init_module(void)
+static int __init at1700_module_init(void)
 {
        if (io == 0)
                printk("at1700: You should not use auto-probing with insmod!\n");
@@ -891,13 +891,14 @@ int __init init_module(void)
        return 0;
 }
 
-void __exit
-cleanup_module(void)
+static void __exit at1700_module_exit(void)
 {
        unregister_netdev(dev_at1700);
        cleanup_card(dev_at1700);
        free_netdev(dev_at1700);
 }
+module_init(at1700_module_init);
+module_exit(at1700_module_exit);
 #endif /* MODULE */
 MODULE_LICENSE("GPL");
 
index 13c293b..4cceaac 100644 (file)
@@ -1155,7 +1155,7 @@ static int lance_set_mac_address( struct net_device *dev, void *addr )
 #ifdef MODULE
 static struct net_device *atarilance_dev;
 
-int __init init_module(void)
+static int __init atarilance_module_init(void)
 {
        atarilance_dev = atarilance_probe(-1);
        if (IS_ERR(atarilance_dev))
@@ -1163,13 +1163,14 @@ int __init init_module(void)
        return 0;
 }
 
-void __exit cleanup_module(void)
+static void __exit atarilance_module_exit(void)
 {
        unregister_netdev(atarilance_dev);
        free_irq(atarilance_dev->irq, atarilance_dev);
        free_netdev(atarilance_dev);
 }
-
+module_init(atarilance_module_init);
+module_exit(atarilance_module_exit);
 #endif /* MODULE */
 
 
diff --git a/drivers/net/atl1/Makefile b/drivers/net/atl1/Makefile
deleted file mode 100644 (file)
index a6b707e..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-obj-$(CONFIG_ATL1)     += atl1.o
-atl1-y                 += atl1_main.o atl1_hw.o atl1_ethtool.o atl1_param.o
diff --git a/drivers/net/atl1/atl1.h b/drivers/net/atl1/atl1.h
deleted file mode 100644 (file)
index ff4765f..0000000
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
- * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
- *
- * Derived from Intel e1000 driver
- * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-
-#ifndef _ATL1_H_
-#define _ATL1_H_
-
-#include <linux/types.h>
-#include <linux/if_vlan.h>
-
-#include "atl1_hw.h"
-
-/* function prototypes needed by multiple files */
-s32 atl1_up(struct atl1_adapter *adapter);
-void atl1_down(struct atl1_adapter *adapter);
-int atl1_reset(struct atl1_adapter *adapter);
-s32 atl1_setup_ring_resources(struct atl1_adapter *adapter);
-void atl1_free_ring_resources(struct atl1_adapter *adapter);
-
-extern char atl1_driver_name[];
-extern char atl1_driver_version[];
-extern const struct ethtool_ops atl1_ethtool_ops;
-
-struct atl1_adapter;
-
-#define ATL1_MAX_INTR          3
-#define ATL1_MAX_TX_BUF_LEN    0x3000  /* 12288 bytes */
-
-#define ATL1_DEFAULT_TPD       256
-#define ATL1_MAX_TPD           1024
-#define ATL1_MIN_TPD           64
-#define ATL1_DEFAULT_RFD       512
-#define ATL1_MIN_RFD           128
-#define ATL1_MAX_RFD           2048
-
-#define ATL1_GET_DESC(R, i, type)      (&(((type *)((R)->desc))[i]))
-#define ATL1_RFD_DESC(R, i)    ATL1_GET_DESC(R, i, struct rx_free_desc)
-#define ATL1_TPD_DESC(R, i)    ATL1_GET_DESC(R, i, struct tx_packet_desc)
-#define ATL1_RRD_DESC(R, i)    ATL1_GET_DESC(R, i, struct rx_return_desc)
-
-/*
- * This detached comment is preserved for documentation purposes only.
- * It was originally attached to some code that got deleted, but seems
- * important enough to keep around...
- *
- * <begin detached comment>
- * Some workarounds require millisecond delays and are run during interrupt
- * context.  Most notably, when establishing link, the phy may need tweaking
- * but cannot process phy register reads/writes faster than millisecond
- * intervals...and we establish link due to a "link status change" interrupt.
- * <end detached comment>
- */
-
-/*
- * atl1_ring_header represents a single, contiguous block of DMA space
- * mapped for the three descriptor rings (tpd, rfd, rrd) and the two
- * message blocks (cmb, smb) described below
- */
-struct atl1_ring_header {
-       void *desc;             /* virtual address */
-       dma_addr_t dma;         /* physical address*/
-       unsigned int size;      /* length in bytes */
-};
-
-/*
- * atl1_buffer is wrapper around a pointer to a socket buffer
- * so a DMA handle can be stored along with the skb
- */
-struct atl1_buffer {
-       struct sk_buff *skb;    /* socket buffer */
-       u16 length;             /* rx buffer length */
-       u16 alloced;            /* 1 if skb allocated */
-       dma_addr_t dma;
-};
-
-/* transmit packet descriptor (tpd) ring */
-struct atl1_tpd_ring {
-       void *desc;             /* descriptor ring virtual address */
-       dma_addr_t dma;         /* descriptor ring physical address */
-       u16 size;               /* descriptor ring length in bytes */
-       u16 count;              /* number of descriptors in the ring */
-       u16 hw_idx;             /* hardware index */
-       atomic_t next_to_clean;
-       atomic_t next_to_use;
-       struct atl1_buffer *buffer_info;
-};
-
-/* receive free descriptor (rfd) ring */
-struct atl1_rfd_ring {
-       void *desc;             /* descriptor ring virtual address */
-       dma_addr_t dma;         /* descriptor ring physical address */
-       u16 size;               /* descriptor ring length in bytes */
-       u16 count;              /* number of descriptors in the ring */
-       atomic_t next_to_use;
-       u16 next_to_clean;
-       struct atl1_buffer *buffer_info;
-};
-
-/* receive return descriptor (rrd) ring */
-struct atl1_rrd_ring {
-       void *desc;             /* descriptor ring virtual address */
-       dma_addr_t dma;         /* descriptor ring physical address */
-       unsigned int size;      /* descriptor ring length in bytes */
-       u16 count;              /* number of descriptors in the ring */
-       u16 next_to_use;
-       atomic_t next_to_clean;
-};
-
-/* coalescing message block (cmb) */
-struct atl1_cmb {
-       struct coals_msg_block *cmb;
-       dma_addr_t dma;
-};
-
-/* statistics message block (smb) */
-struct atl1_smb {
-       struct stats_msg_block *smb;
-       dma_addr_t dma;
-};
-
-/* Statistics counters */
-struct atl1_sft_stats {
-       u64 rx_packets;
-       u64 tx_packets;
-       u64 rx_bytes;
-       u64 tx_bytes;
-       u64 multicast;
-       u64 collisions;
-       u64 rx_errors;
-       u64 rx_length_errors;
-       u64 rx_crc_errors;
-       u64 rx_frame_errors;
-       u64 rx_fifo_errors;
-       u64 rx_missed_errors;
-       u64 tx_errors;
-       u64 tx_fifo_errors;
-       u64 tx_aborted_errors;
-       u64 tx_window_errors;
-       u64 tx_carrier_errors;
-       u64 tx_pause;           /* num pause packets transmitted. */
-       u64 excecol;            /* num tx packets w/ excessive collisions. */
-       u64 deffer;             /* num tx packets deferred */
-       u64 scc;                /* num packets subsequently transmitted
-                                * successfully w/ single prior collision. */
-       u64 mcc;                /* num packets subsequently transmitted
-                                * successfully w/ multiple prior collisions. */
-       u64 latecol;            /* num tx packets  w/ late collisions. */
-       u64 tx_underun;         /* num tx packets aborted due to transmit
-                                * FIFO underrun, or TRD FIFO underrun */
-       u64 tx_trunc;           /* num tx packets truncated due to size
-                                * exceeding MTU, regardless whether truncated
-                                * by the chip or not. (The name doesn't really
-                                * reflect the meaning in this case.) */
-       u64 rx_pause;           /* num Pause packets received. */
-       u64 rx_rrd_ov;
-       u64 rx_trunc;
-};
-
-/* hardware structure */
-struct atl1_hw {
-       u8 __iomem *hw_addr;
-       struct atl1_adapter *back;
-       enum atl1_dma_order dma_ord;
-       enum atl1_dma_rcb rcb_value;
-       enum atl1_dma_req_block dmar_block;
-       enum atl1_dma_req_block dmaw_block;
-       u8 preamble_len;
-       u8 max_retry;           /* Retransmission maximum, after which the
-                                * packet will be discarded */
-       u8 jam_ipg;             /* IPG to start JAM for collision based flow
-                                * control in half-duplex mode. In units of
-                                * 8-bit time */
-       u8 ipgt;                /* Desired back to back inter-packet gap.
-                                * The default is 96-bit time */
-       u8 min_ifg;             /* Minimum number of IFG to enforce in between
-                                * receive frames. Frame gap below such IFP
-                                * is dropped */
-       u8 ipgr1;               /* 64bit Carrier-Sense window */
-       u8 ipgr2;               /* 96-bit IPG window */
-       u8 tpd_burst;           /* Number of TPD to prefetch in cache-aligned
-                                * burst. Each TPD is 16 bytes long */
-       u8 rfd_burst;           /* Number of RFD to prefetch in cache-aligned
-                                * burst. Each RFD is 12 bytes long */
-       u8 rfd_fetch_gap;
-       u8 rrd_burst;           /* Threshold number of RRDs that can be retired
-                                * in a burst. Each RRD is 16 bytes long */
-       u8 tpd_fetch_th;
-       u8 tpd_fetch_gap;
-       u16 tx_jumbo_task_th;
-       u16 txf_burst;          /* Number of data bytes to read in a cache-
-                                * aligned burst. Each SRAM entry is 8 bytes */
-       u16 rx_jumbo_th;        /* Jumbo packet size for non-VLAN packet. VLAN
-                                * packets should add 4 bytes */
-       u16 rx_jumbo_lkah;
-       u16 rrd_ret_timer;      /* RRD retirement timer. Decrement by 1 after
-                                * every 512ns passes. */
-       u16 lcol;               /* Collision Window */
-
-       u16 cmb_tpd;
-       u16 cmb_rrd;
-       u16 cmb_rx_timer;
-       u16 cmb_tx_timer;
-       u32 smb_timer;
-       u16 media_type;
-       u16 autoneg_advertised;
-
-       u16 mii_autoneg_adv_reg;
-       u16 mii_1000t_ctrl_reg;
-
-       u32 max_frame_size;
-       u32 min_frame_size;
-
-       u16 dev_rev;
-
-       /* spi flash */
-       u8 flash_vendor;
-
-       u8 mac_addr[ETH_ALEN];
-       u8 perm_mac_addr[ETH_ALEN];
-
-       bool phy_configured;
-};
-
-struct atl1_adapter {
-       struct net_device *netdev;
-       struct pci_dev *pdev;
-       struct net_device_stats net_stats;
-       struct atl1_sft_stats soft_stats;
-       struct vlan_group *vlgrp;
-       u32 rx_buffer_len;
-       u32 wol;
-       u16 link_speed;
-       u16 link_duplex;
-       spinlock_t lock;
-       struct work_struct tx_timeout_task;
-       struct work_struct link_chg_task;
-       struct work_struct pcie_dma_to_rst_task;
-       struct timer_list watchdog_timer;
-       struct timer_list phy_config_timer;
-       bool phy_timer_pending;
-
-       /* all descriptor rings' memory */
-       struct atl1_ring_header ring_header;
-
-       /* TX */
-       struct atl1_tpd_ring tpd_ring;
-       spinlock_t mb_lock;
-
-       /* RX */
-       struct atl1_rfd_ring rfd_ring;
-       struct atl1_rrd_ring rrd_ring;
-       u64 hw_csum_err;
-       u64 hw_csum_good;
-
-       u16 imt;        /* interrupt moderator timer (2us resolution */
-       u16 ict;        /* interrupt clear timer (2us resolution */
-       struct mii_if_info mii;         /* MII interface info */
-
-       /* structs defined in atl1_hw.h */
-       u32 bd_number;                  /* board number */
-       bool pci_using_64;
-       struct atl1_hw hw;
-       struct atl1_smb smb;
-       struct atl1_cmb cmb;
-};
-
-#endif /* _ATL1_H_ */
diff --git a/drivers/net/atl1/atl1_ethtool.c b/drivers/net/atl1/atl1_ethtool.c
deleted file mode 100644 (file)
index 68a83be..0000000
+++ /dev/null
@@ -1,505 +0,0 @@
-/*
- * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
- * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
- *
- * Derived from Intel e1000 driver
- * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/ethtool.h>
-#include <linux/netdevice.h>
-#include <linux/mii.h>
-#include <asm/uaccess.h>
-
-#include "atl1.h"
-
-struct atl1_stats {
-       char stat_string[ETH_GSTRING_LEN];
-       int sizeof_stat;
-       int stat_offset;
-};
-
-#define ATL1_STAT(m) sizeof(((struct atl1_adapter *)0)->m), \
-       offsetof(struct atl1_adapter, m)
-
-static struct atl1_stats atl1_gstrings_stats[] = {
-       {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
-       {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
-       {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
-       {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
-       {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
-       {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
-       {"rx_dropped", ATL1_STAT(net_stats.rx_dropped)},
-       {"tx_dropped", ATL1_STAT(net_stats.tx_dropped)},
-       {"multicast", ATL1_STAT(soft_stats.multicast)},
-       {"collisions", ATL1_STAT(soft_stats.collisions)},
-       {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
-       {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
-       {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
-       {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
-       {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
-       {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
-       {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
-       {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
-       {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
-       {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
-       {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
-       {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
-       {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
-       {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
-       {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
-       {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
-       {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
-       {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
-       {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
-       {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
-       {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
-};
-
-static void atl1_get_ethtool_stats(struct net_device *netdev,
-                               struct ethtool_stats *stats, u64 *data)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       int i;
-       char *p;
-
-       for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
-               p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
-               data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
-                       sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
-       }
-
-}
-
-static int atl1_get_sset_count(struct net_device *netdev, int sset)
-{
-       switch (sset) {
-       case ETH_SS_STATS:
-               return ARRAY_SIZE(atl1_gstrings_stats);
-       default:
-               return -EOPNOTSUPP;
-       }
-}
-
-static int atl1_get_settings(struct net_device *netdev,
-                               struct ethtool_cmd *ecmd)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-
-       ecmd->supported = (SUPPORTED_10baseT_Half |
-                          SUPPORTED_10baseT_Full |
-                          SUPPORTED_100baseT_Half |
-                          SUPPORTED_100baseT_Full |
-                          SUPPORTED_1000baseT_Full |
-                          SUPPORTED_Autoneg | SUPPORTED_TP);
-       ecmd->advertising = ADVERTISED_TP;
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL) {
-               ecmd->advertising |= ADVERTISED_Autoneg;
-               if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
-                       ecmd->advertising |= ADVERTISED_Autoneg;
-                       ecmd->advertising |=
-                           (ADVERTISED_10baseT_Half |
-                            ADVERTISED_10baseT_Full |
-                            ADVERTISED_100baseT_Half |
-                            ADVERTISED_100baseT_Full |
-                            ADVERTISED_1000baseT_Full);
-               }
-               else
-                       ecmd->advertising |= (ADVERTISED_1000baseT_Full);
-       }
-       ecmd->port = PORT_TP;
-       ecmd->phy_address = 0;
-       ecmd->transceiver = XCVR_INTERNAL;
-
-       if (netif_carrier_ok(adapter->netdev)) {
-               u16 link_speed, link_duplex;
-               atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
-               ecmd->speed = link_speed;
-               if (link_duplex == FULL_DUPLEX)
-                       ecmd->duplex = DUPLEX_FULL;
-               else
-                       ecmd->duplex = DUPLEX_HALF;
-       } else {
-               ecmd->speed = -1;
-               ecmd->duplex = -1;
-       }
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL)
-               ecmd->autoneg = AUTONEG_ENABLE;
-       else
-               ecmd->autoneg = AUTONEG_DISABLE;
-
-       return 0;
-}
-
-static int atl1_set_settings(struct net_device *netdev,
-                               struct ethtool_cmd *ecmd)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-       u16 phy_data;
-       int ret_val = 0;
-       u16 old_media_type = hw->media_type;
-
-       if (netif_running(adapter->netdev)) {
-               dev_dbg(&adapter->pdev->dev, "ethtool shutting down adapter\n");
-               atl1_down(adapter);
-       }
-
-       if (ecmd->autoneg == AUTONEG_ENABLE)
-               hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
-       else {
-               if (ecmd->speed == SPEED_1000) {
-                       if (ecmd->duplex != DUPLEX_FULL) {
-                               dev_warn(&adapter->pdev->dev,
-                                       "can't force to 1000M half duplex\n");
-                               ret_val = -EINVAL;
-                               goto exit_sset;
-                       }
-                       hw->media_type = MEDIA_TYPE_1000M_FULL;
-               } else if (ecmd->speed == SPEED_100) {
-                       if (ecmd->duplex == DUPLEX_FULL) {
-                               hw->media_type = MEDIA_TYPE_100M_FULL;
-                       } else
-                               hw->media_type = MEDIA_TYPE_100M_HALF;
-               } else {
-                       if (ecmd->duplex == DUPLEX_FULL)
-                               hw->media_type = MEDIA_TYPE_10M_FULL;
-                       else
-                               hw->media_type = MEDIA_TYPE_10M_HALF;
-               }
-       }
-       switch (hw->media_type) {
-       case MEDIA_TYPE_AUTO_SENSOR:
-               ecmd->advertising =
-                   ADVERTISED_10baseT_Half |
-                   ADVERTISED_10baseT_Full |
-                   ADVERTISED_100baseT_Half |
-                   ADVERTISED_100baseT_Full |
-                   ADVERTISED_1000baseT_Full |
-                   ADVERTISED_Autoneg | ADVERTISED_TP;
-               break;
-       case MEDIA_TYPE_1000M_FULL:
-               ecmd->advertising =
-                   ADVERTISED_1000baseT_Full |
-                   ADVERTISED_Autoneg | ADVERTISED_TP;
-               break;
-       default:
-               ecmd->advertising = 0;
-               break;
-       }
-       if (atl1_phy_setup_autoneg_adv(hw)) {
-               ret_val = -EINVAL;
-               dev_warn(&adapter->pdev->dev,
-                       "invalid ethtool speed/duplex setting\n");
-               goto exit_sset;
-       }
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL)
-               phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
-       else {
-               switch (hw->media_type) {
-               case MEDIA_TYPE_100M_FULL:
-                       phy_data =
-                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
-                           MII_CR_RESET;
-                       break;
-               case MEDIA_TYPE_100M_HALF:
-                       phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
-                       break;
-               case MEDIA_TYPE_10M_FULL:
-                       phy_data =
-                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
-                       break;
-               default:        /* MEDIA_TYPE_10M_HALF: */
-                       phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
-                       break;
-               }
-       }
-       atl1_write_phy_reg(hw, MII_BMCR, phy_data);
-exit_sset:
-       if (ret_val)
-               hw->media_type = old_media_type;
-
-       if (netif_running(adapter->netdev)) {
-               dev_dbg(&adapter->pdev->dev, "ethtool starting adapter\n");
-               atl1_up(adapter);
-       } else if (!ret_val) {
-               dev_dbg(&adapter->pdev->dev, "ethtool resetting adapter\n");
-               atl1_reset(adapter);
-       }
-       return ret_val;
-}
-
-static void atl1_get_drvinfo(struct net_device *netdev,
-                               struct ethtool_drvinfo *drvinfo)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-
-       strncpy(drvinfo->driver, atl1_driver_name, sizeof(drvinfo->driver));
-       strncpy(drvinfo->version, atl1_driver_version,
-               sizeof(drvinfo->version));
-       strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
-       strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
-               sizeof(drvinfo->bus_info));
-       drvinfo->eedump_len = ATL1_EEDUMP_LEN;
-}
-
-static void atl1_get_wol(struct net_device *netdev,
-                           struct ethtool_wolinfo *wol)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-
-       wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
-       wol->wolopts = 0;
-       if (adapter->wol & ATL1_WUFC_EX)
-               wol->wolopts |= WAKE_UCAST;
-       if (adapter->wol & ATL1_WUFC_MC)
-               wol->wolopts |= WAKE_MCAST;
-       if (adapter->wol & ATL1_WUFC_BC)
-               wol->wolopts |= WAKE_BCAST;
-       if (adapter->wol & ATL1_WUFC_MAG)
-               wol->wolopts |= WAKE_MAGIC;
-       return;
-}
-
-static int atl1_set_wol(struct net_device *netdev,
-                       struct ethtool_wolinfo *wol)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-
-       if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
-               return -EOPNOTSUPP;
-       adapter->wol = 0;
-       if (wol->wolopts & WAKE_UCAST)
-               adapter->wol |= ATL1_WUFC_EX;
-       if (wol->wolopts & WAKE_MCAST)
-               adapter->wol |= ATL1_WUFC_MC;
-       if (wol->wolopts & WAKE_BCAST)
-               adapter->wol |= ATL1_WUFC_BC;
-       if (wol->wolopts & WAKE_MAGIC)
-               adapter->wol |= ATL1_WUFC_MAG;
-       return 0;
-}
-
-static void atl1_get_ringparam(struct net_device *netdev,
-                           struct ethtool_ringparam *ring)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
-       struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
-
-       ring->rx_max_pending = ATL1_MAX_RFD;
-       ring->tx_max_pending = ATL1_MAX_TPD;
-       ring->rx_mini_max_pending = 0;
-       ring->rx_jumbo_max_pending = 0;
-       ring->rx_pending = rxdr->count;
-       ring->tx_pending = txdr->count;
-       ring->rx_mini_pending = 0;
-       ring->rx_jumbo_pending = 0;
-}
-
-static int atl1_set_ringparam(struct net_device *netdev,
-                               struct ethtool_ringparam *ring)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
-       struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
-       struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
-
-       struct atl1_tpd_ring tpd_old, tpd_new;
-       struct atl1_rfd_ring rfd_old, rfd_new;
-       struct atl1_rrd_ring rrd_old, rrd_new;
-       struct atl1_ring_header rhdr_old, rhdr_new;
-       int err;
-
-       tpd_old = adapter->tpd_ring;
-       rfd_old = adapter->rfd_ring;
-       rrd_old = adapter->rrd_ring;
-       rhdr_old = adapter->ring_header;
-
-       if (netif_running(adapter->netdev))
-               atl1_down(adapter);
-
-       rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
-       rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
-                       rfdr->count;
-       rfdr->count = (rfdr->count + 3) & ~3;
-       rrdr->count = rfdr->count;
-
-       tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
-       tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
-                       tpdr->count;
-       tpdr->count = (tpdr->count + 3) & ~3;
-
-       if (netif_running(adapter->netdev)) {
-               /* try to get new resources before deleting old */
-               err = atl1_setup_ring_resources(adapter);
-               if (err)
-                       goto err_setup_ring;
-
-               /*
-                * save the new, restore the old in order to free it,
-                * then restore the new back again
-                */
-
-               rfd_new = adapter->rfd_ring;
-               rrd_new = adapter->rrd_ring;
-               tpd_new = adapter->tpd_ring;
-               rhdr_new = adapter->ring_header;
-               adapter->rfd_ring = rfd_old;
-               adapter->rrd_ring = rrd_old;
-               adapter->tpd_ring = tpd_old;
-               adapter->ring_header = rhdr_old;
-               atl1_free_ring_resources(adapter);
-               adapter->rfd_ring = rfd_new;
-               adapter->rrd_ring = rrd_new;
-               adapter->tpd_ring = tpd_new;
-               adapter->ring_header = rhdr_new;
-
-               err = atl1_up(adapter);
-               if (err)
-                       return err;
-       }
-       return 0;
-
-err_setup_ring:
-       adapter->rfd_ring = rfd_old;
-       adapter->rrd_ring = rrd_old;
-       adapter->tpd_ring = tpd_old;
-       adapter->ring_header = rhdr_old;
-       atl1_up(adapter);
-       return err;
-}
-
-static void atl1_get_pauseparam(struct net_device *netdev,
-                            struct ethtool_pauseparam *epause)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL) {
-               epause->autoneg = AUTONEG_ENABLE;
-       } else {
-               epause->autoneg = AUTONEG_DISABLE;
-       }
-       epause->rx_pause = 1;
-       epause->tx_pause = 1;
-}
-
-static int atl1_set_pauseparam(struct net_device *netdev,
-                            struct ethtool_pauseparam *epause)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL) {
-               epause->autoneg = AUTONEG_ENABLE;
-       } else {
-               epause->autoneg = AUTONEG_DISABLE;
-       }
-
-       epause->rx_pause = 1;
-       epause->tx_pause = 1;
-
-       return 0;
-}
-
-static u32 atl1_get_rx_csum(struct net_device *netdev)
-{
-       return 1;
-}
-
-static void atl1_get_strings(struct net_device *netdev, u32 stringset,
-                               u8 *data)
-{
-       u8 *p = data;
-       int i;
-
-       switch (stringset) {
-       case ETH_SS_STATS:
-               for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
-                       memcpy(p, atl1_gstrings_stats[i].stat_string,
-                               ETH_GSTRING_LEN);
-                       p += ETH_GSTRING_LEN;
-               }
-               break;
-       }
-}
-
-static int atl1_nway_reset(struct net_device *netdev)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-
-       if (netif_running(netdev)) {
-               u16 phy_data;
-               atl1_down(adapter);
-
-               if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-                       hw->media_type == MEDIA_TYPE_1000M_FULL) {
-                       phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
-               } else {
-                       switch (hw->media_type) {
-                       case MEDIA_TYPE_100M_FULL:
-                               phy_data = MII_CR_FULL_DUPLEX |
-                                       MII_CR_SPEED_100 | MII_CR_RESET;
-                               break;
-                       case MEDIA_TYPE_100M_HALF:
-                               phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
-                               break;
-                       case MEDIA_TYPE_10M_FULL:
-                               phy_data = MII_CR_FULL_DUPLEX |
-                                       MII_CR_SPEED_10 | MII_CR_RESET;
-                               break;
-                       default:  /* MEDIA_TYPE_10M_HALF */
-                               phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
-                       }
-               }
-               atl1_write_phy_reg(hw, MII_BMCR, phy_data);
-               atl1_up(adapter);
-       }
-       return 0;
-}
-
-const struct ethtool_ops atl1_ethtool_ops = {
-       .get_settings           = atl1_get_settings,
-       .set_settings           = atl1_set_settings,
-       .get_drvinfo            = atl1_get_drvinfo,
-       .get_wol                = atl1_get_wol,
-       .set_wol                = atl1_set_wol,
-       .get_ringparam          = atl1_get_ringparam,
-       .set_ringparam          = atl1_set_ringparam,
-       .get_pauseparam         = atl1_get_pauseparam,
-       .set_pauseparam         = atl1_set_pauseparam,
-       .get_rx_csum            = atl1_get_rx_csum,
-       .set_tx_csum            = ethtool_op_set_tx_hw_csum,
-       .get_link               = ethtool_op_get_link,
-       .set_sg                 = ethtool_op_set_sg,
-       .get_strings            = atl1_get_strings,
-       .nway_reset             = atl1_nway_reset,
-       .get_ethtool_stats      = atl1_get_ethtool_stats,
-       .get_sset_count         = atl1_get_sset_count,
-       .set_tso                = ethtool_op_set_tso,
-};
diff --git a/drivers/net/atl1/atl1_hw.c b/drivers/net/atl1/atl1_hw.c
deleted file mode 100644 (file)
index 9d3bd22..0000000
+++ /dev/null
@@ -1,720 +0,0 @@
-/*
- * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
- * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
- *
- * Derived from Intel e1000 driver
- * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/if_vlan.h>
-#include <linux/etherdevice.h>
-#include <linux/crc32.h>
-#include <asm/byteorder.h>
-
-#include "atl1.h"
-
-/*
- * Reset the transmit and receive units; mask and clear all interrupts.
- * hw - Struct containing variables accessed by shared code
- * return : ATL1_SUCCESS  or  idle status (if error)
- */
-s32 atl1_reset_hw(struct atl1_hw *hw)
-{
-       struct pci_dev *pdev = hw->back->pdev;
-       u32 icr;
-       int i;
-
-       /*
-        * Clear Interrupt mask to stop board from generating
-        * interrupts & Clear any pending interrupt events
-        */
-       /*
-        * iowrite32(0, hw->hw_addr + REG_IMR);
-        * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
-        */
-
-       /*
-        * Issue Soft Reset to the MAC.  This will reset the chip's
-        * transmit, receive, DMA.  It will not effect
-        * the current PCI configuration.  The global reset bit is self-
-        * clearing, and should clear within a microsecond.
-        */
-       iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
-       ioread32(hw->hw_addr + REG_MASTER_CTRL);
-
-       iowrite16(1, hw->hw_addr + REG_GPHY_ENABLE);
-       ioread16(hw->hw_addr + REG_GPHY_ENABLE);
-
-       msleep(1);              /* delay about 1ms */
-
-       /* Wait at least 10ms for All module to be Idle */
-       for (i = 0; i < 10; i++) {
-               icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
-               if (!icr)
-                       break;
-               msleep(1);      /* delay 1 ms */
-               cpu_relax();    /* FIXME: is this still the right way to do this? */
-       }
-
-       if (icr) {
-               dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
-               return icr;
-       }
-
-       return ATL1_SUCCESS;
-}
-
-/* function about EEPROM
- *
- * check_eeprom_exist
- * return 0 if eeprom exist
- */
-static int atl1_check_eeprom_exist(struct atl1_hw *hw)
-{
-       u32 value;
-       value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
-       if (value & SPI_FLASH_CTRL_EN_VPD) {
-               value &= ~SPI_FLASH_CTRL_EN_VPD;
-               iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
-       }
-
-       value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
-       return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
-}
-
-static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
-{
-       int i;
-       u32 control;
-
-       if (offset & 3)
-               return false;   /* address do not align */
-
-       iowrite32(0, hw->hw_addr + REG_VPD_DATA);
-       control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
-       iowrite32(control, hw->hw_addr + REG_VPD_CAP);
-       ioread32(hw->hw_addr + REG_VPD_CAP);
-
-       for (i = 0; i < 10; i++) {
-               msleep(2);
-               control = ioread32(hw->hw_addr + REG_VPD_CAP);
-               if (control & VPD_CAP_VPD_FLAG)
-                       break;
-       }
-       if (control & VPD_CAP_VPD_FLAG) {
-               *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
-               return true;
-       }
-       return false;           /* timeout */
-}
-
-/*
- * Reads the value from a PHY register
- * hw - Struct containing variables accessed by shared code
- * reg_addr - address of the PHY register to read
- */
-s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
-{
-       u32 val;
-       int i;
-
-       val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
-               MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
-               MDIO_CLK_SEL_SHIFT;
-       iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
-       ioread32(hw->hw_addr + REG_MDIO_CTRL);
-
-       for (i = 0; i < MDIO_WAIT_TIMES; i++) {
-               udelay(2);
-               val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
-               if (!(val & (MDIO_START | MDIO_BUSY)))
-                       break;
-       }
-       if (!(val & (MDIO_START | MDIO_BUSY))) {
-               *phy_data = (u16) val;
-               return ATL1_SUCCESS;
-       }
-       return ATL1_ERR_PHY;
-}
-
-#define CUSTOM_SPI_CS_SETUP    2
-#define CUSTOM_SPI_CLK_HI      2
-#define CUSTOM_SPI_CLK_LO      2
-#define CUSTOM_SPI_CS_HOLD     2
-#define CUSTOM_SPI_CS_HI       3
-
-static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
-{
-       int i;
-       u32 value;
-
-       iowrite32(0, hw->hw_addr + REG_SPI_DATA);
-       iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
-
-       value = SPI_FLASH_CTRL_WAIT_READY |
-           (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
-           SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
-                                            SPI_FLASH_CTRL_CLK_HI_MASK) <<
-           SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
-                                          SPI_FLASH_CTRL_CLK_LO_MASK) <<
-           SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
-                                          SPI_FLASH_CTRL_CS_HOLD_MASK) <<
-           SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
-                                           SPI_FLASH_CTRL_CS_HI_MASK) <<
-           SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
-           SPI_FLASH_CTRL_INS_SHIFT;
-
-       iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
-
-       value |= SPI_FLASH_CTRL_START;
-       iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
-       ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
-
-       for (i = 0; i < 10; i++) {
-               msleep(1);      /* 1ms */
-               value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
-               if (!(value & SPI_FLASH_CTRL_START))
-                       break;
-       }
-
-       if (value & SPI_FLASH_CTRL_START)
-               return false;
-
-       *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
-
-       return true;
-}
-
-/*
- * get_permanent_address
- * return 0 if get valid mac address,
- */
-static int atl1_get_permanent_address(struct atl1_hw *hw)
-{
-       u32 addr[2];
-       u32 i, control;
-       u16 reg;
-       u8 eth_addr[ETH_ALEN];
-       bool key_valid;
-
-       if (is_valid_ether_addr(hw->perm_mac_addr))
-               return 0;
-
-       /* init */
-       addr[0] = addr[1] = 0;
-
-       if (!atl1_check_eeprom_exist(hw)) {     /* eeprom exist */
-               reg = 0;
-               key_valid = false;
-               /* Read out all EEPROM content */
-               i = 0;
-               while (1) {
-                       if (atl1_read_eeprom(hw, i + 0x100, &control)) {
-                               if (key_valid) {
-                                       if (reg == REG_MAC_STA_ADDR)
-                                               addr[0] = control;
-                                       else if (reg == (REG_MAC_STA_ADDR + 4))
-                                               addr[1] = control;
-                                       key_valid = false;
-                               } else if ((control & 0xff) == 0x5A) {
-                                       key_valid = true;
-                                       reg = (u16) (control >> 16);
-                               } else
-                                       break;  /* assume data end while encount an invalid KEYWORD */
-                       } else
-                               break;  /* read error */
-                       i += 4;
-               }
-
-               *(u32 *) &eth_addr[2] = swab32(addr[0]);
-               *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
-               if (is_valid_ether_addr(eth_addr)) {
-                       memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
-                       return 0;
-               }
-               return 1;
-       }
-
-       /* see if SPI FLAGS exist ? */
-       addr[0] = addr[1] = 0;
-       reg = 0;
-       key_valid = false;
-       i = 0;
-       while (1) {
-               if (atl1_spi_read(hw, i + 0x1f000, &control)) {
-                       if (key_valid) {
-                               if (reg == REG_MAC_STA_ADDR)
-                                       addr[0] = control;
-                               else if (reg == (REG_MAC_STA_ADDR + 4))
-                                       addr[1] = control;
-                               key_valid = false;
-                       } else if ((control & 0xff) == 0x5A) {
-                               key_valid = true;
-                               reg = (u16) (control >> 16);
-                       } else
-                               break;  /* data end */
-               } else
-                       break;  /* read error */
-               i += 4;
-       }
-
-       *(u32 *) &eth_addr[2] = swab32(addr[0]);
-       *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
-       if (is_valid_ether_addr(eth_addr)) {
-               memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
-               return 0;
-       }
-
-       /*
-        * On some motherboards, the MAC address is written by the
-        * BIOS directly to the MAC register during POST, and is
-        * not stored in eeprom.  If all else thus far has failed
-        * to fetch the permanent MAC address, try reading it directly.
-        */
-       addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
-       addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
-       *(u32 *) &eth_addr[2] = swab32(addr[0]);
-       *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
-       if (is_valid_ether_addr(eth_addr)) {
-               memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
-               return 0;
-       }
-
-       return 1;
-}
-
-/*
- * Reads the adapter's MAC address from the EEPROM
- * hw - Struct containing variables accessed by shared code
- */
-s32 atl1_read_mac_addr(struct atl1_hw *hw)
-{
-       u16 i;
-
-       if (atl1_get_permanent_address(hw))
-               random_ether_addr(hw->perm_mac_addr);
-
-       for (i = 0; i < ETH_ALEN; i++)
-               hw->mac_addr[i] = hw->perm_mac_addr[i];
-       return ATL1_SUCCESS;
-}
-
-/*
- * Hashes an address to determine its location in the multicast table
- * hw - Struct containing variables accessed by shared code
- * mc_addr - the multicast address to hash
- *
- * atl1_hash_mc_addr
- *  purpose
- *      set hash value for a multicast address
- *      hash calcu processing :
- *          1. calcu 32bit CRC for multicast address
- *          2. reverse crc with MSB to LSB
- */
-u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
-{
-       u32 crc32, value = 0;
-       int i;
-
-       crc32 = ether_crc_le(6, mc_addr);
-       for (i = 0; i < 32; i++)
-               value |= (((crc32 >> i) & 1) << (31 - i));
-
-       return value;
-}
-
-/*
- * Sets the bit in the multicast table corresponding to the hash value.
- * hw - Struct containing variables accessed by shared code
- * hash_value - Multicast address hash value
- */
-void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
-{
-       u32 hash_bit, hash_reg;
-       u32 mta;
-
-       /*
-        * The HASH Table  is a register array of 2 32-bit registers.
-        * It is treated like an array of 64 bits.  We want to set
-        * bit BitArray[hash_value]. So we figure out what register
-        * the bit is in, read it, OR in the new bit, then write
-        * back the new value.  The register is determined by the
-        * upper 7 bits of the hash value and the bit within that
-        * register are determined by the lower 5 bits of the value.
-        */
-       hash_reg = (hash_value >> 31) & 0x1;
-       hash_bit = (hash_value >> 26) & 0x1F;
-       mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
-       mta |= (1 << hash_bit);
-       iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
-}
-
-/*
- * Writes a value to a PHY register
- * hw - Struct containing variables accessed by shared code
- * reg_addr - address of the PHY register to write
- * data - data to write to the PHY
- */
-s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
-{
-       int i;
-       u32 val;
-
-       val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
-           (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
-           MDIO_SUP_PREAMBLE |
-           MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
-       iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
-       ioread32(hw->hw_addr + REG_MDIO_CTRL);
-
-       for (i = 0; i < MDIO_WAIT_TIMES; i++) {
-               udelay(2);
-               val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
-               if (!(val & (MDIO_START | MDIO_BUSY)))
-                       break;
-       }
-
-       if (!(val & (MDIO_START | MDIO_BUSY)))
-               return ATL1_SUCCESS;
-
-       return ATL1_ERR_PHY;
-}
-
-/*
- * Make L001's PHY out of Power Saving State (bug)
- * hw - Struct containing variables accessed by shared code
- * when power on, L001's PHY always on Power saving State
- * (Gigabit Link forbidden)
- */
-static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
-{
-       s32 ret;
-       ret = atl1_write_phy_reg(hw, 29, 0x0029);
-       if (ret)
-               return ret;
-       return atl1_write_phy_reg(hw, 30, 0);
-}
-
-/*
- *TODO: do something or get rid of this
- */
-s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
-{
-/*    s32 ret_val;
- *    u16 phy_data;
- */
-
-/*
-    ret_val = atl1_write_phy_reg(hw, ...);
-    ret_val = atl1_write_phy_reg(hw, ...);
-    ....
-*/
-       return ATL1_SUCCESS;
-}
-
-/*
- * Resets the PHY and make all config validate
- * hw - Struct containing variables accessed by shared code
- *
- * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
- */
-static s32 atl1_phy_reset(struct atl1_hw *hw)
-{
-       struct pci_dev *pdev = hw->back->pdev;
-       s32 ret_val;
-       u16 phy_data;
-
-       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
-           hw->media_type == MEDIA_TYPE_1000M_FULL)
-               phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
-       else {
-               switch (hw->media_type) {
-               case MEDIA_TYPE_100M_FULL:
-                       phy_data =
-                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
-                           MII_CR_RESET;
-                       break;
-               case MEDIA_TYPE_100M_HALF:
-                       phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
-                       break;
-               case MEDIA_TYPE_10M_FULL:
-                       phy_data =
-                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
-                       break;
-               default:        /* MEDIA_TYPE_10M_HALF: */
-                       phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
-                       break;
-               }
-       }
-
-       ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
-       if (ret_val) {
-               u32 val;
-               int i;
-               /* pcie serdes link may be down! */
-               dev_dbg(&pdev->dev, "pcie phy link down\n");
-
-               for (i = 0; i < 25; i++) {
-                       msleep(1);
-                       val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
-                       if (!(val & (MDIO_START | MDIO_BUSY)))
-                               break;
-               }
-
-               if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
-                       dev_warn(&pdev->dev, "pcie link down at least 25ms\n");
-                       return ret_val;
-               }
-       }
-       return ATL1_SUCCESS;
-}
-
-/*
- * Configures PHY autoneg and flow control advertisement settings
- * hw - Struct containing variables accessed by shared code
- */
-s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
-{
-       s32 ret_val;
-       s16 mii_autoneg_adv_reg;
-       s16 mii_1000t_ctrl_reg;
-
-       /* Read the MII Auto-Neg Advertisement Register (Address 4). */
-       mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
-
-       /* Read the MII 1000Base-T Control Register (Address 9). */
-       mii_1000t_ctrl_reg = MII_AT001_CR_1000T_DEFAULT_CAP_MASK;
-
-       /*
-        * First we clear all the 10/100 mb speed bits in the Auto-Neg
-        * Advertisement Register (Address 4) and the 1000 mb speed bits in
-        * the  1000Base-T Control Register (Address 9).
-        */
-       mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
-       mii_1000t_ctrl_reg &= ~MII_AT001_CR_1000T_SPEED_MASK;
-
-       /*
-        * Need to parse media_type  and set up
-        * the appropriate PHY registers.
-        */
-       switch (hw->media_type) {
-       case MEDIA_TYPE_AUTO_SENSOR:
-               mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
-                                       MII_AR_10T_FD_CAPS |
-                                       MII_AR_100TX_HD_CAPS |
-                                       MII_AR_100TX_FD_CAPS);
-               mii_1000t_ctrl_reg |= MII_AT001_CR_1000T_FD_CAPS;
-               break;
-
-       case MEDIA_TYPE_1000M_FULL:
-               mii_1000t_ctrl_reg |= MII_AT001_CR_1000T_FD_CAPS;
-               break;
-
-       case MEDIA_TYPE_100M_FULL:
-               mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
-               break;
-
-       case MEDIA_TYPE_100M_HALF:
-               mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
-               break;
-
-       case MEDIA_TYPE_10M_FULL:
-               mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
-               break;
-
-       default:
-               mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
-               break;
-       }
-
-       /* flow control fixed to enable all */
-       mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
-
-       hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
-       hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
-
-       ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
-       if (ret_val)
-               return ret_val;
-
-       ret_val = atl1_write_phy_reg(hw, MII_AT001_CR, mii_1000t_ctrl_reg);
-       if (ret_val)
-               return ret_val;
-
-       return ATL1_SUCCESS;
-}
-
-/*
- * Configures link settings.
- * hw - Struct containing variables accessed by shared code
- * Assumes the hardware has previously been reset and the
- * transmitter and receiver are not enabled.
- */
-static s32 atl1_setup_link(struct atl1_hw *hw)
-{
-       struct pci_dev *pdev = hw->back->pdev;
-       s32 ret_val;
-
-       /*
-        * Options:
-        *  PHY will advertise value(s) parsed from
-        *  autoneg_advertised and fc
-        *  no matter what autoneg is , We will not wait link result.
-        */
-       ret_val = atl1_phy_setup_autoneg_adv(hw);
-       if (ret_val) {
-               dev_dbg(&pdev->dev, "error setting up autonegotiation\n");
-               return ret_val;
-       }
-       /* SW.Reset , En-Auto-Neg if needed */
-       ret_val = atl1_phy_reset(hw);
-       if (ret_val) {
-               dev_dbg(&pdev->dev, "error resetting phy\n");
-               return ret_val;
-       }
-       hw->phy_configured = true;
-       return ret_val;
-}
-
-static struct atl1_spi_flash_dev flash_table[] = {
-/*     MFR_NAME  WRSR  READ  PRGM  WREN  WRDI  RDSR  RDID  SECTOR_ERASE CHIP_ERASE */
-       {"Atmel", 0x00, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52,        0x62},
-       {"SST",   0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20,        0x60},
-       {"ST",    0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8,        0xC7},
-};
-
-static void atl1_init_flash_opcode(struct atl1_hw *hw)
-{
-       if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
-               hw->flash_vendor = 0;   /* ATMEL */
-
-       /* Init OP table */
-       iowrite8(flash_table[hw->flash_vendor].cmd_program,
-               hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
-       iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
-               hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
-       iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
-               hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
-       iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
-               hw->hw_addr + REG_SPI_FLASH_OP_RDID);
-       iowrite8(flash_table[hw->flash_vendor].cmd_wren,
-               hw->hw_addr + REG_SPI_FLASH_OP_WREN);
-       iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
-               hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
-       iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
-               hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
-       iowrite8(flash_table[hw->flash_vendor].cmd_read,
-               hw->hw_addr + REG_SPI_FLASH_OP_READ);
-}
-
-/*
- * Performs basic configuration of the adapter.
- * hw - Struct containing variables accessed by shared code
- * Assumes that the controller has previously been reset and is in a
- * post-reset uninitialized state. Initializes multicast table,
- * and  Calls routines to setup link
- * Leaves the transmit and receive units disabled and uninitialized.
- */
-s32 atl1_init_hw(struct atl1_hw *hw)
-{
-       u32 ret_val = 0;
-
-       /* Zero out the Multicast HASH table */
-       iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
-       /* clear the old settings from the multicast hash table */
-       iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
-
-       atl1_init_flash_opcode(hw);
-
-       if (!hw->phy_configured) {
-               /* enable GPHY LinkChange Interrrupt */
-               ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
-               if (ret_val)
-                       return ret_val;
-               /* make PHY out of power-saving state */
-               ret_val = atl1_phy_leave_power_saving(hw);
-               if (ret_val)
-                       return ret_val;
-               /* Call a subroutine to configure the link */
-               ret_val = atl1_setup_link(hw);
-       }
-       return ret_val;
-}
-
-/*
- * Detects the current speed and duplex settings of the hardware.
- * hw - Struct containing variables accessed by shared code
- * speed - Speed of the connection
- * duplex - Duplex setting of the connection
- */
-s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
-{
-       struct pci_dev *pdev = hw->back->pdev;
-       s32 ret_val;
-       u16 phy_data;
-
-       /* ; --- Read   PHY Specific Status Register (17) */
-       ret_val = atl1_read_phy_reg(hw, MII_AT001_PSSR, &phy_data);
-       if (ret_val)
-               return ret_val;
-
-       if (!(phy_data & MII_AT001_PSSR_SPD_DPLX_RESOLVED))
-               return ATL1_ERR_PHY_RES;
-
-       switch (phy_data & MII_AT001_PSSR_SPEED) {
-       case MII_AT001_PSSR_1000MBS:
-               *speed = SPEED_1000;
-               break;
-       case MII_AT001_PSSR_100MBS:
-               *speed = SPEED_100;
-               break;
-       case MII_AT001_PSSR_10MBS:
-               *speed = SPEED_10;
-               break;
-       default:
-               dev_dbg(&pdev->dev, "error getting speed\n");
-               return ATL1_ERR_PHY_SPEED;
-               break;
-       }
-       if (phy_data & MII_AT001_PSSR_DPLX)
-               *duplex = FULL_DUPLEX;
-       else
-               *duplex = HALF_DUPLEX;
-
-       return ATL1_SUCCESS;
-}
-
-void atl1_set_mac_addr(struct atl1_hw *hw)
-{
-       u32 value;
-       /*
-        * 00-0B-6A-F6-00-DC
-        * 0:  6AF600DC   1: 000B
-        * low dword
-        */
-       value = (((u32) hw->mac_addr[2]) << 24) |
-           (((u32) hw->mac_addr[3]) << 16) |
-           (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
-       iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
-       /* high dword */
-       value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
-       iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
-}
diff --git a/drivers/net/atl1/atl1_hw.h b/drivers/net/atl1/atl1_hw.h
deleted file mode 100644 (file)
index 939aa0f..0000000
+++ /dev/null
@@ -1,946 +0,0 @@
-/*
- * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
- * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
- *
- * Derived from Intel e1000 driver
- * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- *
- * There are a lot of defines in here that are unused and/or have cryptic
- * names.  Please leave them alone, as they're the closest thing we have
- * to a spec from Attansic at present. *ahem* -- CHS
- */
-
-#ifndef _ATL1_HW_H_
-#define _ATL1_HW_H_
-
-#include <linux/types.h>
-#include <linux/mii.h>
-
-struct atl1_adapter;
-struct atl1_hw;
-
-/* function prototypes needed by multiple files */
-s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw);
-s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data);
-s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex);
-s32 atl1_read_mac_addr(struct atl1_hw *hw);
-s32 atl1_init_hw(struct atl1_hw *hw);
-s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex);
-s32 atl1_set_speed_and_duplex(struct atl1_hw *hw, u16 speed, u16 duplex);
-u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr);
-void atl1_hash_set(struct atl1_hw *hw, u32 hash_value);
-s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data);
-void atl1_set_mac_addr(struct atl1_hw *hw);
-s32 atl1_phy_enter_power_saving(struct atl1_hw *hw);
-s32 atl1_reset_hw(struct atl1_hw *hw);
-void atl1_check_options(struct atl1_adapter *adapter);
-
-/* register definitions */
-#define REG_PCIE_CAP_LIST                      0x58
-
-#define REG_VPD_CAP                            0x6C
-#define VPD_CAP_ID_MASK                                0xff
-#define VPD_CAP_ID_SHIFT                       0
-#define VPD_CAP_NEXT_PTR_MASK                  0xFF
-#define VPD_CAP_NEXT_PTR_SHIFT                 8
-#define VPD_CAP_VPD_ADDR_MASK                  0x7FFF
-#define VPD_CAP_VPD_ADDR_SHIFT                 16
-#define VPD_CAP_VPD_FLAG                       0x80000000
-
-#define REG_VPD_DATA                           0x70
-
-#define REG_SPI_FLASH_CTRL                     0x200
-#define SPI_FLASH_CTRL_STS_NON_RDY             0x1
-#define SPI_FLASH_CTRL_STS_WEN                 0x2
-#define SPI_FLASH_CTRL_STS_WPEN                        0x80
-#define SPI_FLASH_CTRL_DEV_STS_MASK            0xFF
-#define SPI_FLASH_CTRL_DEV_STS_SHIFT           0
-#define SPI_FLASH_CTRL_INS_MASK                        0x7
-#define SPI_FLASH_CTRL_INS_SHIFT               8
-#define SPI_FLASH_CTRL_START                   0x800
-#define SPI_FLASH_CTRL_EN_VPD                  0x2000
-#define SPI_FLASH_CTRL_LDSTART                 0x8000
-#define SPI_FLASH_CTRL_CS_HI_MASK              0x3
-#define SPI_FLASH_CTRL_CS_HI_SHIFT             16
-#define SPI_FLASH_CTRL_CS_HOLD_MASK            0x3
-#define SPI_FLASH_CTRL_CS_HOLD_SHIFT           18
-#define SPI_FLASH_CTRL_CLK_LO_MASK             0x3
-#define SPI_FLASH_CTRL_CLK_LO_SHIFT            20
-#define SPI_FLASH_CTRL_CLK_HI_MASK             0x3
-#define SPI_FLASH_CTRL_CLK_HI_SHIFT            22
-#define SPI_FLASH_CTRL_CS_SETUP_MASK           0x3
-#define SPI_FLASH_CTRL_CS_SETUP_SHIFT          24
-#define SPI_FLASH_CTRL_EROM_PGSZ_MASK          0x3
-#define SPI_FLASH_CTRL_EROM_PGSZ_SHIFT         26
-#define SPI_FLASH_CTRL_WAIT_READY              0x10000000
-
-#define REG_SPI_ADDR                           0x204
-
-#define REG_SPI_DATA                           0x208
-
-#define REG_SPI_FLASH_CONFIG                   0x20C
-#define SPI_FLASH_CONFIG_LD_ADDR_MASK          0xFFFFFF
-#define SPI_FLASH_CONFIG_LD_ADDR_SHIFT         0
-#define SPI_FLASH_CONFIG_VPD_ADDR_MASK         0x3
-#define SPI_FLASH_CONFIG_VPD_ADDR_SHIFT                24
-#define SPI_FLASH_CONFIG_LD_EXIST              0x4000000
-
-#define REG_SPI_FLASH_OP_PROGRAM               0x210
-#define REG_SPI_FLASH_OP_SC_ERASE              0x211
-#define REG_SPI_FLASH_OP_CHIP_ERASE            0x212
-#define REG_SPI_FLASH_OP_RDID                  0x213
-#define REG_SPI_FLASH_OP_WREN                  0x214
-#define REG_SPI_FLASH_OP_RDSR                  0x215
-#define REG_SPI_FLASH_OP_WRSR                  0x216
-#define REG_SPI_FLASH_OP_READ                  0x217
-
-#define REG_TWSI_CTRL                          0x218
-#define TWSI_CTRL_LD_OFFSET_MASK               0xFF
-#define TWSI_CTRL_LD_OFFSET_SHIFT              0
-#define TWSI_CTRL_LD_SLV_ADDR_MASK             0x7
-#define TWSI_CTRL_LD_SLV_ADDR_SHIFT            8
-#define TWSI_CTRL_SW_LDSTART                   0x800
-#define TWSI_CTRL_HW_LDSTART                   0x1000
-#define TWSI_CTRL_SMB_SLV_ADDR_MASK            0x7F
-#define TWSI_CTRL_SMB_SLV_ADDR_SHIFT           15
-#define TWSI_CTRL_LD_EXIST                     0x400000
-#define TWSI_CTRL_READ_FREQ_SEL_MASK           0x3
-#define TWSI_CTRL_READ_FREQ_SEL_SHIFT          23
-#define TWSI_CTRL_FREQ_SEL_100K                        0
-#define TWSI_CTRL_FREQ_SEL_200K                        1
-#define TWSI_CTRL_FREQ_SEL_300K                        2
-#define TWSI_CTRL_FREQ_SEL_400K                        3
-#define TWSI_CTRL_SMB_SLV_ADDR
-#define TWSI_CTRL_WRITE_FREQ_SEL_MASK          0x3
-#define TWSI_CTRL_WRITE_FREQ_SEL_SHIFT         24
-
-#define REG_PCIE_DEV_MISC_CTRL                 0x21C
-#define PCIE_DEV_MISC_CTRL_EXT_PIPE            0x2
-#define PCIE_DEV_MISC_CTRL_RETRY_BUFDIS                0x1
-#define PCIE_DEV_MISC_CTRL_SPIROM_EXIST                0x4
-#define PCIE_DEV_MISC_CTRL_SERDES_ENDIAN       0x8
-#define PCIE_DEV_MISC_CTRL_SERDES_SEL_DIN      0x10
-
-/* Selene Master Control Register */
-#define REG_MASTER_CTRL                                0x1400
-#define MASTER_CTRL_SOFT_RST                   0x1
-#define MASTER_CTRL_MTIMER_EN                  0x2
-#define MASTER_CTRL_ITIMER_EN                  0x4
-#define MASTER_CTRL_MANUAL_INT                 0x8
-#define MASTER_CTRL_REV_NUM_SHIFT              16
-#define MASTER_CTRL_REV_NUM_MASK               0xff
-#define MASTER_CTRL_DEV_ID_SHIFT               24
-#define MASTER_CTRL_DEV_ID_MASK                        0xff
-
-/* Timer Initial Value Register */
-#define REG_MANUAL_TIMER_INIT                  0x1404
-
-/* IRQ ModeratorTimer Initial Value Register */
-#define REG_IRQ_MODU_TIMER_INIT                        0x1408
-
-#define REG_GPHY_ENABLE                                0x140C
-
-/* IRQ Anti-Lost Timer Initial Value Register */
-#define REG_CMBDISDMA_TIMER                    0x140E
-
-/* Block IDLE Status Register */
-#define REG_IDLE_STATUS                                0x1410
-#define IDLE_STATUS_RXMAC                      1
-#define IDLE_STATUS_TXMAC                      2
-#define IDLE_STATUS_RXQ                                4
-#define IDLE_STATUS_TXQ                                8
-#define IDLE_STATUS_DMAR                       0x10
-#define IDLE_STATUS_DMAW                       0x20
-#define IDLE_STATUS_SMB                                0x40
-#define IDLE_STATUS_CMB                                0x80
-
-/* MDIO Control Register */
-#define REG_MDIO_CTRL                          0x1414
-#define MDIO_DATA_MASK                         0xffff
-#define MDIO_DATA_SHIFT                                0
-#define MDIO_REG_ADDR_MASK                     0x1f
-#define MDIO_REG_ADDR_SHIFT                    16
-#define MDIO_RW                                        0x200000
-#define MDIO_SUP_PREAMBLE                      0x400000
-#define MDIO_START                             0x800000
-#define MDIO_CLK_SEL_SHIFT                     24
-#define MDIO_CLK_25_4                          0
-#define MDIO_CLK_25_6                          2
-#define MDIO_CLK_25_8                          3
-#define MDIO_CLK_25_10                         4
-#define MDIO_CLK_25_14                         5
-#define MDIO_CLK_25_20                         6
-#define MDIO_CLK_25_28                         7
-#define MDIO_BUSY                              0x8000000
-#define MDIO_WAIT_TIMES                                30
-
-/* MII PHY Status Register */
-#define REG_PHY_STATUS                         0x1418
-
-/* BIST Control and Status Register0 (for the Packet Memory) */
-#define REG_BIST0_CTRL                         0x141c
-#define BIST0_NOW                              0x1
-#define BIST0_SRAM_FAIL                                0x2
-#define BIST0_FUSE_FLAG                                0x4
-#define REG_BIST1_CTRL                         0x1420
-#define BIST1_NOW                              0x1
-#define BIST1_SRAM_FAIL                                0x2
-#define BIST1_FUSE_FLAG                                0x4
-
-/* MAC Control Register */
-#define REG_MAC_CTRL                           0x1480
-#define MAC_CTRL_TX_EN                         1
-#define MAC_CTRL_RX_EN                         2
-#define MAC_CTRL_TX_FLOW                       4
-#define MAC_CTRL_RX_FLOW                       8
-#define MAC_CTRL_LOOPBACK                      0x10
-#define MAC_CTRL_DUPLX                         0x20
-#define MAC_CTRL_ADD_CRC                       0x40
-#define MAC_CTRL_PAD                           0x80
-#define MAC_CTRL_LENCHK                                0x100
-#define MAC_CTRL_HUGE_EN                       0x200
-#define MAC_CTRL_PRMLEN_SHIFT                  10
-#define MAC_CTRL_PRMLEN_MASK                   0xf
-#define MAC_CTRL_RMV_VLAN                      0x4000
-#define MAC_CTRL_PROMIS_EN                     0x8000
-#define MAC_CTRL_TX_PAUSE                      0x10000
-#define MAC_CTRL_SCNT                          0x20000
-#define MAC_CTRL_SRST_TX                       0x40000
-#define MAC_CTRL_TX_SIMURST                    0x80000
-#define MAC_CTRL_SPEED_SHIFT                   20
-#define MAC_CTRL_SPEED_MASK                    0x300000
-#define MAC_CTRL_SPEED_1000                    2
-#define MAC_CTRL_SPEED_10_100                  1
-#define MAC_CTRL_DBG_TX_BKPRESURE              0x400000
-#define MAC_CTRL_TX_HUGE                       0x800000
-#define MAC_CTRL_RX_CHKSUM_EN                  0x1000000
-#define MAC_CTRL_MC_ALL_EN                     0x2000000
-#define MAC_CTRL_BC_EN                         0x4000000
-#define MAC_CTRL_DBG                           0x8000000
-
-/* MAC IPG/IFG Control Register */
-#define REG_MAC_IPG_IFG                                0x1484
-#define MAC_IPG_IFG_IPGT_SHIFT                 0
-#define MAC_IPG_IFG_IPGT_MASK                  0x7f
-#define MAC_IPG_IFG_MIFG_SHIFT                 8
-#define MAC_IPG_IFG_MIFG_MASK                  0xff
-#define MAC_IPG_IFG_IPGR1_SHIFT                        16
-#define MAC_IPG_IFG_IPGR1_MASK                 0x7f
-#define MAC_IPG_IFG_IPGR2_SHIFT                        24
-#define MAC_IPG_IFG_IPGR2_MASK                 0x7f
-
-/* MAC STATION ADDRESS */
-#define REG_MAC_STA_ADDR                       0x1488
-
-/* Hash table for multicast address */
-#define REG_RX_HASH_TABLE                      0x1490
-
-/* MAC Half-Duplex Control Register */
-#define REG_MAC_HALF_DUPLX_CTRL                        0x1498
-#define MAC_HALF_DUPLX_CTRL_LCOL_SHIFT         0
-#define MAC_HALF_DUPLX_CTRL_LCOL_MASK          0x3ff
-#define MAC_HALF_DUPLX_CTRL_RETRY_SHIFT                12
-#define MAC_HALF_DUPLX_CTRL_RETRY_MASK         0xf
-#define MAC_HALF_DUPLX_CTRL_EXC_DEF_EN         0x10000
-#define MAC_HALF_DUPLX_CTRL_NO_BACK_C          0x20000
-#define MAC_HALF_DUPLX_CTRL_NO_BACK_P          0x40000
-#define MAC_HALF_DUPLX_CTRL_ABEBE              0x80000
-#define MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT                20
-#define MAC_HALF_DUPLX_CTRL_ABEBT_MASK         0xf
-#define MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT       24
-#define MAC_HALF_DUPLX_CTRL_JAMIPG_MASK                0xf
-
-/* Maximum Frame Length Control Register */
-#define REG_MTU                                        0x149c
-
-/* Wake-On-Lan control register */
-#define REG_WOL_CTRL                           0x14a0
-#define WOL_PATTERN_EN                         0x00000001
-#define WOL_PATTERN_PME_EN                     0x00000002
-#define WOL_MAGIC_EN                           0x00000004
-#define WOL_MAGIC_PME_EN                       0x00000008
-#define WOL_LINK_CHG_EN                                0x00000010
-#define WOL_LINK_CHG_PME_EN                    0x00000020
-#define WOL_PATTERN_ST                         0x00000100
-#define WOL_MAGIC_ST                           0x00000200
-#define WOL_LINKCHG_ST                         0x00000400
-#define WOL_CLK_SWITCH_EN                      0x00008000
-#define WOL_PT0_EN                             0x00010000
-#define WOL_PT1_EN                             0x00020000
-#define WOL_PT2_EN                             0x00040000
-#define WOL_PT3_EN                             0x00080000
-#define WOL_PT4_EN                             0x00100000
-#define WOL_PT5_EN                             0x00200000
-#define WOL_PT6_EN                             0x00400000
-
-/* WOL Length ( 2 DWORD ) */
-#define REG_WOL_PATTERN_LEN                    0x14a4
-#define WOL_PT_LEN_MASK                                0x7f
-#define WOL_PT0_LEN_SHIFT                      0
-#define WOL_PT1_LEN_SHIFT                      8
-#define WOL_PT2_LEN_SHIFT                      16
-#define WOL_PT3_LEN_SHIFT                      24
-#define WOL_PT4_LEN_SHIFT                      0
-#define WOL_PT5_LEN_SHIFT                      8
-#define WOL_PT6_LEN_SHIFT                      16
-
-/* Internal SRAM Partition Register */
-#define REG_SRAM_RFD_ADDR                      0x1500
-#define REG_SRAM_RFD_LEN                       (REG_SRAM_RFD_ADDR+ 4)
-#define REG_SRAM_RRD_ADDR                      (REG_SRAM_RFD_ADDR+ 8)
-#define REG_SRAM_RRD_LEN                       (REG_SRAM_RFD_ADDR+12)
-#define REG_SRAM_TPD_ADDR                      (REG_SRAM_RFD_ADDR+16)
-#define REG_SRAM_TPD_LEN                       (REG_SRAM_RFD_ADDR+20)
-#define REG_SRAM_TRD_ADDR                      (REG_SRAM_RFD_ADDR+24)
-#define REG_SRAM_TRD_LEN                       (REG_SRAM_RFD_ADDR+28)
-#define REG_SRAM_RXF_ADDR                      (REG_SRAM_RFD_ADDR+32)
-#define REG_SRAM_RXF_LEN                       (REG_SRAM_RFD_ADDR+36)
-#define REG_SRAM_TXF_ADDR                      (REG_SRAM_RFD_ADDR+40)
-#define REG_SRAM_TXF_LEN                       (REG_SRAM_RFD_ADDR+44)
-#define REG_SRAM_TCPH_PATH_ADDR                        (REG_SRAM_RFD_ADDR+48)
-#define SRAM_TCPH_ADDR_MASK                    0x0fff
-#define SRAM_TCPH_ADDR_SHIFT                   0
-#define SRAM_PATH_ADDR_MASK                    0x0fff
-#define SRAM_PATH_ADDR_SHIFT                   16
-
-/* Load Ptr Register */
-#define REG_LOAD_PTR                           (REG_SRAM_RFD_ADDR+52)
-
-/* Descriptor Control register */
-#define REG_DESC_BASE_ADDR_HI                  0x1540
-#define REG_DESC_RFD_ADDR_LO                   (REG_DESC_BASE_ADDR_HI+4)
-#define REG_DESC_RRD_ADDR_LO                   (REG_DESC_BASE_ADDR_HI+8)
-#define REG_DESC_TPD_ADDR_LO                   (REG_DESC_BASE_ADDR_HI+12)
-#define REG_DESC_CMB_ADDR_LO                   (REG_DESC_BASE_ADDR_HI+16)
-#define REG_DESC_SMB_ADDR_LO                   (REG_DESC_BASE_ADDR_HI+20)
-#define REG_DESC_RFD_RRD_RING_SIZE             (REG_DESC_BASE_ADDR_HI+24)
-#define DESC_RFD_RING_SIZE_MASK                        0x7ff
-#define DESC_RFD_RING_SIZE_SHIFT               0
-#define DESC_RRD_RING_SIZE_MASK                        0x7ff
-#define DESC_RRD_RING_SIZE_SHIFT               16
-#define REG_DESC_TPD_RING_SIZE                 (REG_DESC_BASE_ADDR_HI+28)
-#define DESC_TPD_RING_SIZE_MASK                        0x3ff
-#define DESC_TPD_RING_SIZE_SHIFT               0
-
-/* TXQ Control Register */
-#define REG_TXQ_CTRL                           0x1580
-#define TXQ_CTRL_TPD_BURST_NUM_SHIFT           0
-#define TXQ_CTRL_TPD_BURST_NUM_MASK            0x1f
-#define TXQ_CTRL_EN                            0x20
-#define TXQ_CTRL_ENH_MODE                      0x40
-#define TXQ_CTRL_TPD_FETCH_TH_SHIFT            8
-#define TXQ_CTRL_TPD_FETCH_TH_MASK             0x3f
-#define TXQ_CTRL_TXF_BURST_NUM_SHIFT           16
-#define TXQ_CTRL_TXF_BURST_NUM_MASK            0xffff
-
-/* Jumbo packet Threshold for task offload */
-#define REG_TX_JUMBO_TASK_TH_TPD_IPG           0x1584
-#define TX_JUMBO_TASK_TH_MASK                  0x7ff
-#define TX_JUMBO_TASK_TH_SHIFT                 0
-#define TX_TPD_MIN_IPG_MASK                    0x1f
-#define TX_TPD_MIN_IPG_SHIFT                   16
-
-/* RXQ Control Register */
-#define REG_RXQ_CTRL                           0x15a0
-#define RXQ_CTRL_RFD_BURST_NUM_SHIFT           0
-#define RXQ_CTRL_RFD_BURST_NUM_MASK            0xff
-#define RXQ_CTRL_RRD_BURST_THRESH_SHIFT                8
-#define RXQ_CTRL_RRD_BURST_THRESH_MASK         0xff
-#define RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT                16
-#define RXQ_CTRL_RFD_PREF_MIN_IPG_MASK         0x1f
-#define RXQ_CTRL_CUT_THRU_EN                   0x40000000
-#define RXQ_CTRL_EN                            0x80000000
-
-/* Rx jumbo packet threshold and rrd  retirement timer */
-#define REG_RXQ_JMBOSZ_RRDTIM                  (REG_RXQ_CTRL+ 4)
-#define RXQ_JMBOSZ_TH_MASK                     0x7ff
-#define RXQ_JMBOSZ_TH_SHIFT                    0
-#define RXQ_JMBO_LKAH_MASK                     0xf
-#define RXQ_JMBO_LKAH_SHIFT                    11
-#define RXQ_RRD_TIMER_MASK                     0xffff
-#define RXQ_RRD_TIMER_SHIFT                    16
-
-/* RFD flow control register */
-#define REG_RXQ_RXF_PAUSE_THRESH               (REG_RXQ_CTRL+ 8)
-#define RXQ_RXF_PAUSE_TH_HI_SHIFT              16
-#define RXQ_RXF_PAUSE_TH_HI_MASK               0xfff
-#define RXQ_RXF_PAUSE_TH_LO_SHIFT              0
-#define RXQ_RXF_PAUSE_TH_LO_MASK               0xfff
-
-/* RRD flow control register */
-#define REG_RXQ_RRD_PAUSE_THRESH               (REG_RXQ_CTRL+12)
-#define RXQ_RRD_PAUSE_TH_HI_SHIFT              0
-#define RXQ_RRD_PAUSE_TH_HI_MASK               0xfff
-#define RXQ_RRD_PAUSE_TH_LO_SHIFT              16
-#define RXQ_RRD_PAUSE_TH_LO_MASK               0xfff
-
-/* DMA Engine Control Register */
-#define REG_DMA_CTRL                           0x15c0
-#define DMA_CTRL_DMAR_IN_ORDER                 0x1
-#define DMA_CTRL_DMAR_ENH_ORDER                        0x2
-#define DMA_CTRL_DMAR_OUT_ORDER                        0x4
-#define DMA_CTRL_RCB_VALUE                     0x8
-#define DMA_CTRL_DMAR_BURST_LEN_SHIFT          4
-#define DMA_CTRL_DMAR_BURST_LEN_MASK           7
-#define DMA_CTRL_DMAW_BURST_LEN_SHIFT          7
-#define DMA_CTRL_DMAW_BURST_LEN_MASK           7
-#define DMA_CTRL_DMAR_EN                               0x400
-#define DMA_CTRL_DMAW_EN                               0x800
-
-/* CMB/SMB Control Register */
-#define REG_CSMB_CTRL                          0x15d0
-#define CSMB_CTRL_CMB_NOW                      1
-#define CSMB_CTRL_SMB_NOW                      2
-#define CSMB_CTRL_CMB_EN                       4
-#define CSMB_CTRL_SMB_EN                       8
-
-/* CMB DMA Write Threshold Register */
-#define REG_CMB_WRITE_TH                       (REG_CSMB_CTRL+ 4)
-#define CMB_RRD_TH_SHIFT                       0
-#define CMB_RRD_TH_MASK                                0x7ff
-#define CMB_TPD_TH_SHIFT                       16
-#define CMB_TPD_TH_MASK                                0x7ff
-
-/* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
-#define REG_CMB_WRITE_TIMER                    (REG_CSMB_CTRL+ 8)
-#define CMB_RX_TM_SHIFT                                0
-#define CMB_RX_TM_MASK                         0xffff
-#define CMB_TX_TM_SHIFT                                16
-#define CMB_TX_TM_MASK                         0xffff
-
-/* Number of packet received since last CMB write */
-#define REG_CMB_RX_PKT_CNT                     (REG_CSMB_CTRL+12)
-
-/* Number of packet transmitted since last CMB write */
-#define REG_CMB_TX_PKT_CNT                     (REG_CSMB_CTRL+16)
-
-/* SMB auto DMA timer register */
-#define REG_SMB_TIMER                          (REG_CSMB_CTRL+20)
-
-/* Mailbox Register */
-#define REG_MAILBOX                            0x15f0
-#define MB_RFD_PROD_INDX_SHIFT                 0
-#define MB_RFD_PROD_INDX_MASK                  0x7ff
-#define MB_RRD_CONS_INDX_SHIFT                 11
-#define MB_RRD_CONS_INDX_MASK                  0x7ff
-#define MB_TPD_PROD_INDX_SHIFT                 22
-#define MB_TPD_PROD_INDX_MASK                  0x3ff
-
-/* Interrupt Status Register */
-#define REG_ISR                                        0x1600
-#define ISR_SMB                                        1
-#define ISR_TIMER                              2
-#define ISR_MANUAL                             4
-#define ISR_RXF_OV                             8
-#define ISR_RFD_UNRUN                          0x10
-#define ISR_RRD_OV                             0x20
-#define ISR_TXF_UNRUN                          0x40
-#define ISR_LINK                               0x80
-#define ISR_HOST_RFD_UNRUN                     0x100
-#define ISR_HOST_RRD_OV                                0x200
-#define ISR_DMAR_TO_RST                                0x400
-#define ISR_DMAW_TO_RST                                0x800
-#define ISR_GPHY                               0x1000
-#define ISR_RX_PKT                             0x10000
-#define ISR_TX_PKT                             0x20000
-#define ISR_TX_DMA                             0x40000
-#define ISR_RX_DMA                             0x80000
-#define ISR_CMB_RX                             0x100000
-#define ISR_CMB_TX                             0x200000
-#define ISR_MAC_RX                             0x400000
-#define ISR_MAC_TX                             0x800000
-#define ISR_UR_DETECTED                                0x1000000
-#define ISR_FERR_DETECTED                      0x2000000
-#define ISR_NFERR_DETECTED                     0x4000000
-#define ISR_CERR_DETECTED                      0x8000000
-#define ISR_PHY_LINKDOWN                       0x10000000
-#define ISR_DIS_SMB                            0x20000000
-#define ISR_DIS_DMA                            0x40000000
-#define ISR_DIS_INT                            0x80000000
-
-/* Interrupt Mask Register */
-#define REG_IMR                                        0x1604
-
-/* Normal Interrupt mask  */
-#define IMR_NORMAL_MASK        (\
-       ISR_SMB         |\
-       ISR_GPHY        |\
-       ISR_PHY_LINKDOWN|\
-       ISR_DMAR_TO_RST |\
-       ISR_DMAW_TO_RST |\
-       ISR_CMB_TX      |\
-       ISR_CMB_RX      )
-
-/* Debug Interrupt Mask  (enable all interrupt) */
-#define IMR_DEBUG_MASK (\
-       ISR_SMB         |\
-       ISR_TIMER       |\
-       ISR_MANUAL      |\
-       ISR_RXF_OV      |\
-       ISR_RFD_UNRUN   |\
-       ISR_RRD_OV      |\
-       ISR_TXF_UNRUN   |\
-       ISR_LINK        |\
-       ISR_CMB_TX      |\
-       ISR_CMB_RX      |\
-       ISR_RX_PKT      |\
-       ISR_TX_PKT      |\
-       ISR_MAC_RX      |\
-       ISR_MAC_TX      )
-
-/* Interrupt Status Register */
-#define REG_RFD_RRD_IDX                                0x1800
-#define REG_TPD_IDX                            0x1804
-
-/*  MII definition */
-/* PHY Common Register */
-#define MII_AT001_CR                                   0x09
-#define MII_AT001_SR                                   0x0A
-#define MII_AT001_ESR                                  0x0F
-#define MII_AT001_PSCR                                 0x10
-#define MII_AT001_PSSR                                 0x11
-
-/* PHY Control Register */
-#define MII_CR_SPEED_SELECT_MSB                                0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
-#define MII_CR_COLL_TEST_ENABLE                                0x0080  /* Collision test enable */
-#define MII_CR_FULL_DUPLEX                             0x0100  /* FDX =1, half duplex =0 */
-#define MII_CR_RESTART_AUTO_NEG                                0x0200  /* Restart auto negotiation */
-#define MII_CR_ISOLATE                                 0x0400  /* Isolate PHY from MII */
-#define MII_CR_POWER_DOWN                              0x0800  /* Power down */
-#define MII_CR_AUTO_NEG_EN                             0x1000  /* Auto Neg Enable */
-#define MII_CR_SPEED_SELECT_LSB                                0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
-#define MII_CR_LOOPBACK                                        0x4000  /* 0 = normal, 1 = loopback */
-#define MII_CR_RESET                                   0x8000  /* 0 = normal, 1 = PHY reset */
-#define MII_CR_SPEED_MASK                              0x2040
-#define MII_CR_SPEED_1000                              0x0040
-#define MII_CR_SPEED_100                               0x2000
-#define MII_CR_SPEED_10                                        0x0000
-
-/* PHY Status Register */
-#define MII_SR_EXTENDED_CAPS                           0x0001  /* Extended register capabilities */
-#define MII_SR_JABBER_DETECT                           0x0002  /* Jabber Detected */
-#define MII_SR_LINK_STATUS                             0x0004  /* Link Status 1 = link */
-#define MII_SR_AUTONEG_CAPS                            0x0008  /* Auto Neg Capable */
-#define MII_SR_REMOTE_FAULT                            0x0010  /* Remote Fault Detect */
-#define MII_SR_AUTONEG_COMPLETE                                0x0020  /* Auto Neg Complete */
-#define MII_SR_PREAMBLE_SUPPRESS                       0x0040  /* Preamble may be suppressed */
-#define MII_SR_EXTENDED_STATUS                         0x0100  /* Ext. status info in Reg 0x0F */
-#define MII_SR_100T2_HD_CAPS                           0x0200  /* 100T2 Half Duplex Capable */
-#define MII_SR_100T2_FD_CAPS                           0x0400  /* 100T2 Full Duplex Capable */
-#define MII_SR_10T_HD_CAPS                             0x0800  /* 10T   Half Duplex Capable */
-#define MII_SR_10T_FD_CAPS                             0x1000  /* 10T   Full Duplex Capable */
-#define MII_SR_100X_HD_CAPS                            0x2000  /* 100X  Half Duplex Capable */
-#define MII_SR_100X_FD_CAPS                            0x4000  /* 100X  Full Duplex Capable */
-#define MII_SR_100T4_CAPS                              0x8000  /* 100T4 Capable */
-
-/* Link partner ability register. */
-#define MII_LPA_SLCT                                   0x001f  /* Same as advertise selector  */
-#define MII_LPA_10HALF                                 0x0020  /* Can do 10mbps half-duplex   */
-#define MII_LPA_10FULL                                 0x0040  /* Can do 10mbps full-duplex   */
-#define MII_LPA_100HALF                                        0x0080  /* Can do 100mbps half-duplex  */
-#define MII_LPA_100FULL                                        0x0100  /* Can do 100mbps full-duplex  */
-#define MII_LPA_100BASE4                               0x0200  /* 100BASE-T4  */
-#define MII_LPA_PAUSE                                  0x0400  /* PAUSE */
-#define MII_LPA_ASYPAUSE                               0x0800  /* Asymmetrical PAUSE */
-#define MII_LPA_RFAULT                                 0x2000  /* Link partner faulted        */
-#define MII_LPA_LPACK                                  0x4000  /* Link partner acked us       */
-#define MII_LPA_NPAGE                                  0x8000  /* Next page bit               */
-
-/* Autoneg Advertisement Register */
-#define MII_AR_SELECTOR_FIELD                          0x0001  /* indicates IEEE 802.3 CSMA/CD */
-#define MII_AR_10T_HD_CAPS                             0x0020  /* 10T   Half Duplex Capable */
-#define MII_AR_10T_FD_CAPS                             0x0040  /* 10T   Full Duplex Capable */
-#define MII_AR_100TX_HD_CAPS                           0x0080  /* 100TX Half Duplex Capable */
-#define MII_AR_100TX_FD_CAPS                           0x0100  /* 100TX Full Duplex Capable */
-#define MII_AR_100T4_CAPS                              0x0200  /* 100T4 Capable */
-#define MII_AR_PAUSE                                   0x0400  /* Pause operation desired */
-#define MII_AR_ASM_DIR                                 0x0800  /* Asymmetric Pause Direction bit */
-#define MII_AR_REMOTE_FAULT                            0x2000  /* Remote Fault detected */
-#define MII_AR_NEXT_PAGE                               0x8000  /* Next Page ability supported */
-#define MII_AR_SPEED_MASK                              0x01E0
-#define MII_AR_DEFAULT_CAP_MASK                                0x0DE0
-
-/* 1000BASE-T Control Register */
-#define MII_AT001_CR_1000T_HD_CAPS                     0x0100  /* Advertise 1000T HD capability */
-#define MII_AT001_CR_1000T_FD_CAPS                     0x0200  /* Advertise 1000T FD capability  */
-#define MII_AT001_CR_1000T_REPEATER_DTE                        0x0400  /* 1=Repeater/switch device port, 0=DTE device */
-#define MII_AT001_CR_1000T_MS_VALUE                    0x0800  /* 1=Configure PHY as Master, 0=Configure PHY as Slave */
-#define MII_AT001_CR_1000T_MS_ENABLE                   0x1000  /* 1=Master/Slave manual config value, 0=Automatic Master/Slave config */
-#define MII_AT001_CR_1000T_TEST_MODE_NORMAL            0x0000  /* Normal Operation */
-#define MII_AT001_CR_1000T_TEST_MODE_1                 0x2000  /* Transmit Waveform test */
-#define MII_AT001_CR_1000T_TEST_MODE_2                 0x4000  /* Master Transmit Jitter test */
-#define MII_AT001_CR_1000T_TEST_MODE_3                 0x6000  /* Slave Transmit Jitter test */
-#define MII_AT001_CR_1000T_TEST_MODE_4                 0x8000  /* Transmitter Distortion test */
-#define MII_AT001_CR_1000T_SPEED_MASK                  0x0300
-#define MII_AT001_CR_1000T_DEFAULT_CAP_MASK            0x0300
-
-/* 1000BASE-T Status Register */
-#define MII_AT001_SR_1000T_LP_HD_CAPS                  0x0400  /* LP is 1000T HD capable */
-#define MII_AT001_SR_1000T_LP_FD_CAPS                  0x0800  /* LP is 1000T FD capable */
-#define MII_AT001_SR_1000T_REMOTE_RX_STATUS            0x1000  /* Remote receiver OK */
-#define MII_AT001_SR_1000T_LOCAL_RX_STATUS             0x2000  /* Local receiver OK */
-#define MII_AT001_SR_1000T_MS_CONFIG_RES               0x4000  /* 1=Local TX is Master, 0=Slave */
-#define MII_AT001_SR_1000T_MS_CONFIG_FAULT             0x8000  /* Master/Slave config fault */
-#define MII_AT001_SR_1000T_REMOTE_RX_STATUS_SHIFT      12
-#define MII_AT001_SR_1000T_LOCAL_RX_STATUS_SHIFT       13
-
-/* Extended Status Register */
-#define MII_AT001_ESR_1000T_HD_CAPS                    0x1000  /* 1000T HD capable */
-#define MII_AT001_ESR_1000T_FD_CAPS                    0x2000  /* 1000T FD capable */
-#define MII_AT001_ESR_1000X_HD_CAPS                    0x4000  /* 1000X HD capable */
-#define MII_AT001_ESR_1000X_FD_CAPS                    0x8000  /* 1000X FD capable */
-
-/* AT001 PHY Specific Control Register */
-#define MII_AT001_PSCR_JABBER_DISABLE                  0x0001  /* 1=Jabber Function disabled */
-#define MII_AT001_PSCR_POLARITY_REVERSAL               0x0002  /* 1=Polarity Reversal enabled */
-#define MII_AT001_PSCR_SQE_TEST                                0x0004  /* 1=SQE Test enabled */
-#define MII_AT001_PSCR_MAC_POWERDOWN                   0x0008
-#define MII_AT001_PSCR_CLK125_DISABLE                  0x0010  /* 1=CLK125 low, 0=CLK125 toggling */
-#define MII_AT001_PSCR_MDI_MANUAL_MODE                 0x0000  /* MDI Crossover Mode bits 6:5, Manual MDI configuration */
-#define MII_AT001_PSCR_MDIX_MANUAL_MODE                        0x0020  /* Manual MDIX configuration */
-#define MII_AT001_PSCR_AUTO_X_1000T                    0x0040  /* 1000BASE-T: Auto crossover, 100BASE-TX/10BASE-T: MDI Mode */
-#define MII_AT001_PSCR_AUTO_X_MODE                     0x0060  /* Auto crossover enabled all speeds. */
-#define MII_AT001_PSCR_10BT_EXT_DIST_ENABLE            0x0080  /* 1=Enable Extended 10BASE-T distance (Lower 10BASE-T RX Threshold), 0=Normal 10BASE-T RX Threshold */
-#define MII_AT001_PSCR_MII_5BIT_ENABLE                 0x0100  /* 1=5-Bit interface in 100BASE-TX, 0=MII interface in 100BASE-TX */
-#define MII_AT001_PSCR_SCRAMBLER_DISABLE               0x0200  /* 1=Scrambler disable */
-#define MII_AT001_PSCR_FORCE_LINK_GOOD                 0x0400  /* 1=Force link good */
-#define MII_AT001_PSCR_ASSERT_CRS_ON_TX                        0x0800  /* 1=Assert CRS on Transmit */
-#define MII_AT001_PSCR_POLARITY_REVERSAL_SHIFT         1
-#define MII_AT001_PSCR_AUTO_X_MODE_SHIFT               5
-#define MII_AT001_PSCR_10BT_EXT_DIST_ENABLE_SHIFT      7
-
-/* AT001 PHY Specific Status Register */
-#define MII_AT001_PSSR_SPD_DPLX_RESOLVED               0x0800  /* 1=Speed & Duplex resolved */
-#define MII_AT001_PSSR_DPLX                            0x2000  /* 1=Duplex 0=Half Duplex */
-#define MII_AT001_PSSR_SPEED                           0xC000  /* Speed, bits 14:15 */
-#define MII_AT001_PSSR_10MBS                           0x0000  /* 00=10Mbs */
-#define MII_AT001_PSSR_100MBS                          0x4000  /* 01=100Mbs */
-#define MII_AT001_PSSR_1000MBS                         0x8000  /* 10=1000Mbs */
-
-/* PCI Command Register Bit Definitions */
-#define PCI_REG_COMMAND                                        0x04    /* PCI Command Register */
-#define CMD_IO_SPACE                                   0x0001
-#define CMD_MEMORY_SPACE                               0x0002
-#define CMD_BUS_MASTER                                 0x0004
-
-/* Wake Up Filter Control */
-#define ATL1_WUFC_LNKC 0x00000001      /* Link Status Change Wakeup Enable */
-#define ATL1_WUFC_MAG  0x00000002      /* Magic Packet Wakeup Enable */
-#define ATL1_WUFC_EX   0x00000004      /* Directed Exact Wakeup Enable */
-#define ATL1_WUFC_MC   0x00000008      /* Multicast Wakeup Enable */
-#define ATL1_WUFC_BC   0x00000010      /* Broadcast Wakeup Enable */
-
-/* Error Codes */
-#define ATL1_SUCCESS                   0
-#define ATL1_ERR_EEPROM                        1
-#define ATL1_ERR_PHY                   2
-#define ATL1_ERR_CONFIG                        3
-#define ATL1_ERR_PARAM                 4
-#define ATL1_ERR_MAC_TYPE              5
-#define ATL1_ERR_PHY_TYPE              6
-#define ATL1_ERR_PHY_SPEED             7
-#define ATL1_ERR_PHY_RES               8
-
-#define SPEED_0                0xffff
-#define SPEED_10       10
-#define SPEED_100      100
-#define SPEED_1000     1000
-#define HALF_DUPLEX    1
-#define FULL_DUPLEX    2
-
-#define MEDIA_TYPE_AUTO_SENSOR 0
-#define MEDIA_TYPE_1000M_FULL  1
-#define MEDIA_TYPE_100M_FULL   2
-#define MEDIA_TYPE_100M_HALF   3
-#define MEDIA_TYPE_10M_FULL    4
-#define MEDIA_TYPE_10M_HALF    5
-
-#define ADVERTISE_10_HALF              0x0001
-#define ADVERTISE_10_FULL              0x0002
-#define ADVERTISE_100_HALF             0x0004
-#define ADVERTISE_100_FULL             0x0008
-#define ADVERTISE_1000_HALF            0x0010
-#define ADVERTISE_1000_FULL            0x0020
-#define AUTONEG_ADVERTISE_SPEED_DEFAULT        0x002F  /* Everything but 1000-Half */
-#define AUTONEG_ADVERTISE_10_100_ALL   0x000F  /* All 10/100 speeds */
-#define AUTONEG_ADVERTISE_10_ALL       0x0003  /* 10Mbps Full & Half speeds */
-
-#define MAX_JUMBO_FRAME_SIZE           0x2800
-
-#define PHY_AUTO_NEG_TIME      45      /* 4.5 Seconds */
-#define PHY_FORCE_TIME         20      /* 2.0 Seconds */
-
-/* For checksumming , the sum of all words in the EEPROM should equal 0xBABA */
-#define EEPROM_SUM             0xBABA
-
-#define ATL1_EEDUMP_LEN                48
-
-/* Statistics counters collected by the MAC */
-struct stats_msg_block {
-       /* rx */
-       u32 rx_ok;              /* The number of good packet received. */
-       u32 rx_bcast;           /* The number of good broadcast packet received. */
-       u32 rx_mcast;           /* The number of good multicast packet received. */
-       u32 rx_pause;           /* The number of Pause packet received. */
-       u32 rx_ctrl;            /* The number of Control packet received other than Pause frame. */
-       u32 rx_fcs_err;         /* The number of packets with bad FCS. */
-       u32 rx_len_err;         /* The number of packets with mismatch of length field and actual size. */
-       u32 rx_byte_cnt;        /* The number of bytes of good packet received. FCS is NOT included. */
-       u32 rx_runt;            /* The number of packets received that are less than 64 byte long and with good FCS. */
-       u32 rx_frag;            /* The number of packets received that are less than 64 byte long and with bad FCS. */
-       u32 rx_sz_64;           /* The number of good and bad packets received that are 64 byte long. */
-       u32 rx_sz_65_127;       /* The number of good and bad packets received that are between 65 and 127-byte long. */
-       u32 rx_sz_128_255;      /* The number of good and bad packets received that are between 128 and 255-byte long. */
-       u32 rx_sz_256_511;      /* The number of good and bad packets received that are between 256 and 511-byte long. */
-       u32 rx_sz_512_1023;     /* The number of good and bad packets received that are between 512 and 1023-byte long. */
-       u32 rx_sz_1024_1518;    /* The number of good and bad packets received that are between 1024 and 1518-byte long. */
-       u32 rx_sz_1519_max;     /* The number of good and bad packets received that are between 1519-byte and MTU. */
-       u32 rx_sz_ov;           /* The number of good and bad packets received that are more than MTU size ┼íC truncated by Selene. */
-       u32 rx_rxf_ov;          /* The number of frame dropped due to occurrence of RX FIFO overflow. */
-       u32 rx_rrd_ov;          /* The number of frame dropped due to occurrence of RRD overflow. */
-       u32 rx_align_err;       /* Alignment Error */
-       u32 rx_bcast_byte_cnt;  /* The byte count of broadcast packet received, excluding FCS. */
-       u32 rx_mcast_byte_cnt;  /* The byte count of multicast packet received, excluding FCS. */
-       u32 rx_err_addr;        /* The number of packets dropped due to address filtering. */
-
-       /* tx */
-       u32 tx_ok;              /* The number of good packet transmitted. */
-       u32 tx_bcast;           /* The number of good broadcast packet transmitted. */
-       u32 tx_mcast;           /* The number of good multicast packet transmitted. */
-       u32 tx_pause;           /* The number of Pause packet transmitted. */
-       u32 tx_exc_defer;       /* The number of packets transmitted with excessive deferral. */
-       u32 tx_ctrl;            /* The number of packets transmitted is a control frame, excluding Pause frame. */
-       u32 tx_defer;           /* The number of packets transmitted that is deferred. */
-       u32 tx_byte_cnt;        /* The number of bytes of data transmitted. FCS is NOT included. */
-       u32 tx_sz_64;           /* The number of good and bad packets transmitted that are 64 byte long. */
-       u32 tx_sz_65_127;       /* The number of good and bad packets transmitted that are between 65 and 127-byte long. */
-       u32 tx_sz_128_255;      /* The number of good and bad packets transmitted that are between 128 and 255-byte long. */
-       u32 tx_sz_256_511;      /* The number of good and bad packets transmitted that are between 256 and 511-byte long. */
-       u32 tx_sz_512_1023;     /* The number of good and bad packets transmitted that are between 512 and 1023-byte long. */
-       u32 tx_sz_1024_1518;    /* The number of good and bad packets transmitted that are between 1024 and 1518-byte long. */
-       u32 tx_sz_1519_max;     /* The number of good and bad packets transmitted that are between 1519-byte and MTU. */
-       u32 tx_1_col;           /* The number of packets subsequently transmitted successfully with a single prior collision. */
-       u32 tx_2_col;           /* The number of packets subsequently transmitted successfully with multiple prior collisions. */
-       u32 tx_late_col;        /* The number of packets transmitted with late collisions. */
-       u32 tx_abort_col;       /* The number of transmit packets aborted due to excessive collisions. */
-       u32 tx_underrun;        /* The number of transmit packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */
-       u32 tx_rd_eop;          /* The number of times that read beyond the EOP into the next frame area when TRD was not written timely */
-       u32 tx_len_err;         /* The number of transmit packets with length field does NOT match the actual frame size. */
-       u32 tx_trunc;           /* The number of transmit packets truncated due to size exceeding MTU. */
-       u32 tx_bcast_byte;      /* The byte count of broadcast packet transmitted, excluding FCS. */
-       u32 tx_mcast_byte;      /* The byte count of multicast packet transmitted, excluding FCS. */
-       u32 smb_updated;        /* 1: SMB Updated. This is used by software as the indication of the statistics update.
-                                * Software should clear this bit as soon as retrieving the statistics information. */
-};
-
-/* Coalescing Message Block */
-struct coals_msg_block {
-       u32 int_stats;          /* interrupt status */
-       u16 rrd_prod_idx;       /* TRD Producer Index. */
-       u16 rfd_cons_idx;       /* RFD Consumer Index. */
-       u16 update;             /* Selene sets this bit every time it DMA the CMB to host memory.
-                                * Software supposes to clear this bit when CMB information is processed. */
-       u16 tpd_cons_idx;       /* TPD Consumer Index. */
-};
-
-/* RRD descriptor */
-struct rx_return_desc {
-       u8 num_buf;             /* Number of RFD buffers used by the received packet */
-       u8 resved;
-       u16 buf_indx;           /* RFD Index of the first buffer */
-       union {
-               u32 valid;
-               struct {
-                       u16 rx_chksum;
-                       u16 pkt_size;
-               } xsum_sz;
-       } xsz;
-
-       u16 pkt_flg;            /* Packet flags */
-       u16 err_flg;            /* Error flags */
-       u16 resved2;
-       u16 vlan_tag;           /* VLAN TAG */
-};
-
-#define PACKET_FLAG_ETH_TYPE   0x0080
-#define PACKET_FLAG_VLAN_INS   0x0100
-#define PACKET_FLAG_ERR                0x0200
-#define PACKET_FLAG_IPV4       0x0400
-#define PACKET_FLAG_UDP                0x0800
-#define PACKET_FLAG_TCP                0x1000
-#define PACKET_FLAG_BCAST      0x2000
-#define PACKET_FLAG_MCAST      0x4000
-#define PACKET_FLAG_PAUSE      0x8000
-
-#define ERR_FLAG_CRC           0x0001
-#define ERR_FLAG_CODE          0x0002
-#define ERR_FLAG_DRIBBLE       0x0004
-#define ERR_FLAG_RUNT          0x0008
-#define ERR_FLAG_OV            0x0010
-#define ERR_FLAG_TRUNC         0x0020
-#define ERR_FLAG_IP_CHKSUM     0x0040
-#define ERR_FLAG_L4_CHKSUM     0x0080
-#define ERR_FLAG_LEN           0x0100
-#define ERR_FLAG_DES_ADDR      0x0200
-
-/* RFD descriptor */
-struct rx_free_desc {
-       __le64 buffer_addr;     /* Address of the descriptor's data buffer */
-       __le16 buf_len;         /* Size of the receive buffer in host memory, in byte */
-       u16 coalese;            /* Update consumer index to host after the reception of this frame */
-       /* __attribute__ ((packed)) is required */
-} __attribute__ ((packed));
-
-/* tsopu defines */
-#define TSO_PARAM_BUFLEN_MASK           0x3FFF
-#define TSO_PARAM_BUFLEN_SHIFT          0
-#define TSO_PARAM_DMAINT_MASK           0x0001
-#define TSO_PARAM_DMAINT_SHIFT          14
-#define TSO_PARAM_PKTNT_MASK            0x0001
-#define TSO_PARAM_PKTINT_SHIFT          15
-#define TSO_PARAM_VLANTAG_MASK          0xFFFF
-#define TSO_PARAM_VLAN_SHIFT            16
-
-/* tsopl defines */
-#define TSO_PARAM_EOP_MASK              0x0001
-#define TSO_PARAM_EOP_SHIFT             0
-#define TSO_PARAM_COALESCE_MASK         0x0001
-#define TSO_PARAM_COALESCE_SHIFT        1
-#define TSO_PARAM_INSVLAG_MASK          0x0001
-#define TSO_PARAM_INSVLAG_SHIFT         2
-#define TSO_PARAM_CUSTOMCKSUM_MASK      0x0001
-#define TSO_PARAM_CUSTOMCKSUM_SHIFT     3
-#define TSO_PARAM_SEGMENT_MASK          0x0001
-#define TSO_PARAM_SEGMENT_SHIFT         4
-#define TSO_PARAM_IPCKSUM_MASK          0x0001
-#define TSO_PARAM_IPCKSUM_SHIFT         5
-#define TSO_PARAM_TCPCKSUM_MASK         0x0001
-#define TSO_PARAM_TCPCKSUM_SHIFT        6
-#define TSO_PARAM_UDPCKSUM_MASK         0x0001
-#define TSO_PARAM_UDPCKSUM_SHIFT        7
-#define TSO_PARAM_VLANTAGGED_MASK       0x0001
-#define TSO_PARAM_VLANTAGGED_SHIFT      8
-#define TSO_PARAM_ETHTYPE_MASK          0x0001
-#define TSO_PARAM_ETHTYPE_SHIFT         9
-#define TSO_PARAM_IPHL_MASK             0x000F
-#define TSO_PARAM_IPHL_SHIFT            10
-#define TSO_PARAM_TCPHDRLEN_MASK        0x000F
-#define TSO_PARAM_TCPHDRLEN_SHIFT       14
-#define TSO_PARAM_HDRFLAG_MASK          0x0001
-#define TSO_PARAM_HDRFLAG_SHIFT         18
-#define TSO_PARAM_MSS_MASK              0x1FFF
-#define TSO_PARAM_MSS_SHIFT             19
-
-/* csumpu defines */
-#define CSUM_PARAM_BUFLEN_MASK          0x3FFF
-#define CSUM_PARAM_BUFLEN_SHIFT         0
-#define CSUM_PARAM_DMAINT_MASK          0x0001
-#define CSUM_PARAM_DMAINT_SHIFT         14
-#define CSUM_PARAM_PKTINT_MASK          0x0001
-#define CSUM_PARAM_PKTINT_SHIFT         15
-#define CSUM_PARAM_VALANTAG_MASK        0xFFFF
-#define CSUM_PARAM_VALAN_SHIFT          16
-
-/* csumpl defines*/
-#define CSUM_PARAM_EOP_MASK             0x0001
-#define CSUM_PARAM_EOP_SHIFT            0
-#define CSUM_PARAM_COALESCE_MASK        0x0001
-#define CSUM_PARAM_COALESCE_SHIFT       1
-#define CSUM_PARAM_INSVLAG_MASK         0x0001
-#define CSUM_PARAM_INSVLAG_SHIFT        2
-#define CSUM_PARAM_CUSTOMCKSUM_MASK     0x0001
-#define CSUM_PARAM_CUSTOMCKSUM_SHIFT    3
-#define CSUM_PARAM_SEGMENT_MASK         0x0001
-#define CSUM_PARAM_SEGMENT_SHIFT        4
-#define CSUM_PARAM_IPCKSUM_MASK         0x0001
-#define CSUM_PARAM_IPCKSUM_SHIFT        5
-#define CSUM_PARAM_TCPCKSUM_MASK        0x0001
-#define CSUM_PARAM_TCPCKSUM_SHIFT       6
-#define CSUM_PARAM_UDPCKSUM_MASK        0x0001
-#define CSUM_PARAM_UDPCKSUM_SHIFT       7
-#define CSUM_PARAM_VLANTAGGED_MASK      0x0001
-#define CSUM_PARAM_VLANTAGGED_SHIFT     8
-#define CSUM_PARAM_ETHTYPE_MASK         0x0001
-#define CSUM_PARAM_ETHTYPE_SHIFT        9
-#define CSUM_PARAM_IPHL_MASK            0x000F
-#define CSUM_PARAM_IPHL_SHIFT           10
-#define CSUM_PARAM_PLOADOFFSET_MASK     0x00FF
-#define CSUM_PARAM_PLOADOFFSET_SHIFT    16
-#define CSUM_PARAM_XSUMOFFSET_MASK      0x00FF
-#define CSUM_PARAM_XSUMOFFSET_SHIFT     24
-
-/* TPD descriptor */
-struct tso_param {
-        /* The order of these declarations is important -- don't change it */
-        u32 tsopu;      /* tso_param upper word */
-        u32 tsopl;      /* tso_param lower word */
-};
-
-struct csum_param {
-        /* The order of these declarations is important -- don't change it */
-        u32 csumpu;     /* csum_param upper word */
-        u32 csumpl;     /* csum_param lower word */
-};
-
-union tpd_descr {
-       u64 data;
-       struct csum_param csum;
-       struct tso_param tso;
-};
-
-struct tx_packet_desc {
-       __le64 buffer_addr;
-       union tpd_descr desc;
-};
-
-/* DMA Order Settings */
-enum atl1_dma_order {
-       atl1_dma_ord_in = 1,
-       atl1_dma_ord_enh = 2,
-       atl1_dma_ord_out = 4
-};
-
-enum atl1_dma_rcb {
-       atl1_rcb_64 = 0,
-       atl1_rcb_128 = 1
-};
-
-enum atl1_dma_req_block {
-       atl1_dma_req_128 = 0,
-       atl1_dma_req_256 = 1,
-       atl1_dma_req_512 = 2,
-       atl1_dma_req_1024 = 3,
-       atl1_dma_req_2048 = 4,
-       atl1_dma_req_4096 = 5
-};
-
-struct atl1_spi_flash_dev {
-       const char *manu_name;  /* manufacturer id */
-       /* op-code */
-       u8 cmd_wrsr;
-       u8 cmd_read;
-       u8 cmd_program;
-       u8 cmd_wren;
-       u8 cmd_wrdi;
-       u8 cmd_rdsr;
-       u8 cmd_rdid;
-       u8 cmd_sector_erase;
-       u8 cmd_chip_erase;
-};
-
-#endif /* _ATL1_HW_H_ */
diff --git a/drivers/net/atl1/atl1_param.c b/drivers/net/atl1/atl1_param.c
deleted file mode 100644 (file)
index 4246bb9..0000000
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
- * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
- *
- * Derived from Intel e1000 driver
- * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59
- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */
-
-#include <linux/types.h>
-#include <linux/moduleparam.h>
-#include <linux/pci.h>
-#include "atl1.h"
-
-/*
- * This is the only thing that needs to be changed to adjust the
- * maximum number of ports that the driver can manage.
- */
-#define ATL1_MAX_NIC 4
-
-#define OPTION_UNSET    -1
-#define OPTION_DISABLED 0
-#define OPTION_ENABLED  1
-
-#define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
-
-/*
- * Interrupt Moderate Timer in units of 2 us
- *
- * Valid Range: 10-65535
- *
- * Default Value: 100 (200us)
- */
-static int __devinitdata int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
-static int num_int_mod_timer = 0;
-module_param_array_named(int_mod_timer, int_mod_timer, int, &num_int_mod_timer, 0);
-MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
-
-/*
- * flash_vendor
- *
- * Valid Range: 0-2
- *
- * 0 - Atmel
- * 1 - SST
- * 2 - ST
- *
- * Default Value: 0
- */
-static int __devinitdata flash_vendor[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
-static int num_flash_vendor = 0;
-module_param_array_named(flash_vendor, flash_vendor, int, &num_flash_vendor, 0);
-MODULE_PARM_DESC(flash_vendor, "SPI flash vendor");
-
-#define DEFAULT_INT_MOD_CNT    100     /* 200us */
-#define MAX_INT_MOD_CNT                65000
-#define MIN_INT_MOD_CNT                50
-
-#define FLASH_VENDOR_DEFAULT   0
-#define FLASH_VENDOR_MIN       0
-#define FLASH_VENDOR_MAX       2
-
-struct atl1_option {
-       enum { enable_option, range_option, list_option } type;
-       char *name;
-       char *err;
-       int def;
-       union {
-               struct {        /* range_option info */
-                       int min;
-                       int max;
-               } r;
-               struct {        /* list_option info */
-                       int nr;
-                       struct atl1_opt_list {
-                               int i;
-                               char *str;
-                       } *p;
-               } l;
-       } arg;
-};
-
-static int __devinit atl1_validate_option(int *value, struct atl1_option *opt, struct pci_dev *pdev)
-{
-       if (*value == OPTION_UNSET) {
-               *value = opt->def;
-               return 0;
-       }
-
-       switch (opt->type) {
-       case enable_option:
-               switch (*value) {
-               case OPTION_ENABLED:
-                       dev_info(&pdev->dev, "%s enabled\n", opt->name);
-                       return 0;
-               case OPTION_DISABLED:
-                       dev_info(&pdev->dev, "%s disabled\n", opt->name);
-                       return 0;
-               }
-               break;
-       case range_option:
-               if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
-                       dev_info(&pdev->dev, "%s set to %i\n", opt->name,
-                               *value);
-                       return 0;
-               }
-               break;
-       case list_option:{
-                       int i;
-                       struct atl1_opt_list *ent;
-
-                       for (i = 0; i < opt->arg.l.nr; i++) {
-                               ent = &opt->arg.l.p[i];
-                               if (*value == ent->i) {
-                                       if (ent->str[0] != '\0')
-                                               dev_info(&pdev->dev, "%s\n",
-                                                       ent->str);
-                                       return 0;
-                               }
-                       }
-               }
-               break;
-
-       default:
-               break;
-       }
-
-       dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
-               opt->name, *value, opt->err);
-       *value = opt->def;
-       return -1;
-}
-
-/*
- * atl1_check_options - Range Checking for Command Line Parameters
- * @adapter: board private structure
- *
- * This routine checks all command line parameters for valid user
- * input.  If an invalid value is given, or if no user specified
- * value exists, a default value is used.  The final value is stored
- * in a variable in the adapter structure.
- */
-void __devinit atl1_check_options(struct atl1_adapter *adapter)
-{
-       struct pci_dev *pdev = adapter->pdev;
-       int bd = adapter->bd_number;
-       if (bd >= ATL1_MAX_NIC) {
-               dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
-               dev_notice(&pdev->dev, "using defaults for all values\n");
-       }
-       {                       /* Interrupt Moderate Timer */
-               struct atl1_option opt = {
-                       .type = range_option,
-                       .name = "Interrupt Moderator Timer",
-                       .err = "using default of "
-                               __MODULE_STRING(DEFAULT_INT_MOD_CNT),
-                       .def = DEFAULT_INT_MOD_CNT,
-                       .arg = {.r =
-                               {.min = MIN_INT_MOD_CNT,.max = MAX_INT_MOD_CNT}}
-               };
-               int val;
-               if (num_int_mod_timer > bd) {
-                       val = int_mod_timer[bd];
-                       atl1_validate_option(&val, &opt, pdev);
-                       adapter->imt = (u16) val;
-               } else
-                       adapter->imt = (u16) (opt.def);
-       }
-
-       {                       /* Flash Vendor */
-               struct atl1_option opt = {
-                       .type = range_option,
-                       .name = "SPI Flash Vendor",
-                       .err = "using default of "
-                               __MODULE_STRING(FLASH_VENDOR_DEFAULT),
-                       .def = DEFAULT_INT_MOD_CNT,
-                       .arg = {.r =
-                               {.min = FLASH_VENDOR_MIN,.max =
-                                FLASH_VENDOR_MAX}}
-               };
-               int val;
-               if (num_flash_vendor > bd) {
-                       val = flash_vendor[bd];
-                       atl1_validate_option(&val, &opt, pdev);
-                       adapter->hw.flash_vendor = (u8) val;
-               } else
-                       adapter->hw.flash_vendor = (u8) (opt.def);
-       }
-}
diff --git a/drivers/net/atlx/Makefile b/drivers/net/atlx/Makefile
new file mode 100644 (file)
index 0000000..ca45553
--- /dev/null
@@ -0,0 +1 @@
+obj-$(CONFIG_ATL1)     += atl1.o
similarity index 57%
rename from drivers/net/atl1/atl1_main.c
rename to drivers/net/atlx/atl1.c
index 129b8b3..5586fc6 100644 (file)
@@ -1,6 +1,6 @@
 /*
  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
- * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
+ * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
  * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  *
  * Derived from Intel e1000 driver
@@ -36,7 +36,6 @@
  * A very incomplete list of things that need to be dealt with:
  *
  * TODO:
- * Fix TSO; tx performance is horrible with TSO enabled.
  * Wake on LAN.
  * Add more ethtool functions.
  * Fix abstruse irq enable/disable condition described here:
  * SMP torture testing
  */
 
-#include <linux/types.h>
-#include <linux/netdevice.h>
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/skbuff.h>
+#include <asm/atomic.h>
+#include <asm/byteorder.h>
+
+#include <linux/compiler.h>
+#include <linux/crc32.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/etherdevice.h>
-#include <linux/if_vlan.h>
-#include <linux/if_ether.h>
-#include <linux/irqreturn.h>
-#include <linux/workqueue.h>
-#include <linux/timer.h>
-#include <linux/jiffies.h>
 #include <linux/hardirq.h>
+#include <linux/if_ether.h>
+#include <linux/if_vlan.h>
+#include <linux/in.h>
 #include <linux/interrupt.h>
+#include <linux/ip.h>
 #include <linux/irqflags.h>
-#include <linux/dma-mapping.h>
+#include <linux/irqreturn.h>
+#include <linux/jiffies.h>
+#include <linux/mii.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
 #include <linux/net.h>
+#include <linux/netdevice.h>
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
 #include <linux/pm.h>
-#include <linux/in.h>
-#include <linux/ip.h>
+#include <linux/skbuff.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/string.h>
 #include <linux/tcp.h>
-#include <linux/compiler.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include <net/checksum.h>
+#include <linux/timer.h>
+#include <linux/types.h>
+#include <linux/workqueue.h>
 
-#include <asm/atomic.h>
-#include <asm/byteorder.h>
+#include <net/checksum.h>
 
 #include "atl1.h"
 
-#define DRIVER_VERSION "2.0.7"
-
-char atl1_driver_name[] = "atl1";
-static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
-static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
-char atl1_driver_version[] = DRIVER_VERSION;
-
-MODULE_AUTHOR
-    ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
-MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DRIVER_VERSION);
+/* Temporary hack for merging atl1 and atl2 */
+#include "atlx.c"
 
 /*
  * atl1_pci_tbl - PCI Device ID Table
@@ -104,9 +98,720 @@ static const struct pci_device_id atl1_pci_tbl[] = {
        /* required last entry */
        {0,}
 };
-
 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 
+static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
+       NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
+
+static int debug = -1;
+module_param(debug, int, 0);
+MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
+
+/*
+ * Reset the transmit and receive units; mask and clear all interrupts.
+ * hw - Struct containing variables accessed by shared code
+ * return : 0  or  idle status (if error)
+ */
+static s32 atl1_reset_hw(struct atl1_hw *hw)
+{
+       struct pci_dev *pdev = hw->back->pdev;
+       struct atl1_adapter *adapter = hw->back;
+       u32 icr;
+       int i;
+
+       /*
+        * Clear Interrupt mask to stop board from generating
+        * interrupts & Clear any pending interrupt events
+        */
+       /*
+        * iowrite32(0, hw->hw_addr + REG_IMR);
+        * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
+        */
+
+       /*
+        * Issue Soft Reset to the MAC.  This will reset the chip's
+        * transmit, receive, DMA.  It will not effect
+        * the current PCI configuration.  The global reset bit is self-
+        * clearing, and should clear within a microsecond.
+        */
+       iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
+       ioread32(hw->hw_addr + REG_MASTER_CTRL);
+
+       iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
+       ioread16(hw->hw_addr + REG_PHY_ENABLE);
+
+       /* delay about 1ms */
+       msleep(1);
+
+       /* Wait at least 10ms for All module to be Idle */
+       for (i = 0; i < 10; i++) {
+               icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
+               if (!icr)
+                       break;
+               /* delay 1 ms */
+               msleep(1);
+               /* FIXME: still the right way to do this? */
+               cpu_relax();
+       }
+
+       if (icr) {
+               if (netif_msg_hw(adapter))
+                       dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
+               return icr;
+       }
+
+       return 0;
+}
+
+/* function about EEPROM
+ *
+ * check_eeprom_exist
+ * return 0 if eeprom exist
+ */
+static int atl1_check_eeprom_exist(struct atl1_hw *hw)
+{
+       u32 value;
+       value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
+       if (value & SPI_FLASH_CTRL_EN_VPD) {
+               value &= ~SPI_FLASH_CTRL_EN_VPD;
+               iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
+       }
+
+       value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
+       return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
+}
+
+static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
+{
+       int i;
+       u32 control;
+
+       if (offset & 3)
+               /* address do not align */
+               return false;
+
+       iowrite32(0, hw->hw_addr + REG_VPD_DATA);
+       control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
+       iowrite32(control, hw->hw_addr + REG_VPD_CAP);
+       ioread32(hw->hw_addr + REG_VPD_CAP);
+
+       for (i = 0; i < 10; i++) {
+               msleep(2);
+               control = ioread32(hw->hw_addr + REG_VPD_CAP);
+               if (control & VPD_CAP_VPD_FLAG)
+                       break;
+       }
+       if (control & VPD_CAP_VPD_FLAG) {
+               *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
+               return true;
+       }
+       /* timeout */
+       return false;
+}
+
+/*
+ * Reads the value from a PHY register
+ * hw - Struct containing variables accessed by shared code
+ * reg_addr - address of the PHY register to read
+ */
+s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
+{
+       u32 val;
+       int i;
+
+       val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
+               MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
+               MDIO_CLK_SEL_SHIFT;
+       iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
+       ioread32(hw->hw_addr + REG_MDIO_CTRL);
+
+       for (i = 0; i < MDIO_WAIT_TIMES; i++) {
+               udelay(2);
+               val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
+               if (!(val & (MDIO_START | MDIO_BUSY)))
+                       break;
+       }
+       if (!(val & (MDIO_START | MDIO_BUSY))) {
+               *phy_data = (u16) val;
+               return 0;
+       }
+       return ATLX_ERR_PHY;
+}
+
+#define CUSTOM_SPI_CS_SETUP    2
+#define CUSTOM_SPI_CLK_HI      2
+#define CUSTOM_SPI_CLK_LO      2
+#define CUSTOM_SPI_CS_HOLD     2
+#define CUSTOM_SPI_CS_HI       3
+
+static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
+{
+       int i;
+       u32 value;
+
+       iowrite32(0, hw->hw_addr + REG_SPI_DATA);
+       iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
+
+       value = SPI_FLASH_CTRL_WAIT_READY |
+           (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
+           SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
+                                            SPI_FLASH_CTRL_CLK_HI_MASK) <<
+           SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
+                                          SPI_FLASH_CTRL_CLK_LO_MASK) <<
+           SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
+                                          SPI_FLASH_CTRL_CS_HOLD_MASK) <<
+           SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
+                                           SPI_FLASH_CTRL_CS_HI_MASK) <<
+           SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
+           SPI_FLASH_CTRL_INS_SHIFT;
+
+       iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
+
+       value |= SPI_FLASH_CTRL_START;
+       iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
+       ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
+
+       for (i = 0; i < 10; i++) {
+               msleep(1);
+               value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
+               if (!(value & SPI_FLASH_CTRL_START))
+                       break;
+       }
+
+       if (value & SPI_FLASH_CTRL_START)
+               return false;
+
+       *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
+
+       return true;
+}
+
+/*
+ * get_permanent_address
+ * return 0 if get valid mac address,
+ */
+static int atl1_get_permanent_address(struct atl1_hw *hw)
+{
+       u32 addr[2];
+       u32 i, control;
+       u16 reg;
+       u8 eth_addr[ETH_ALEN];
+       bool key_valid;
+
+       if (is_valid_ether_addr(hw->perm_mac_addr))
+               return 0;
+
+       /* init */
+       addr[0] = addr[1] = 0;
+
+       if (!atl1_check_eeprom_exist(hw)) {
+               reg = 0;
+               key_valid = false;
+               /* Read out all EEPROM content */
+               i = 0;
+               while (1) {
+                       if (atl1_read_eeprom(hw, i + 0x100, &control)) {
+                               if (key_valid) {
+                                       if (reg == REG_MAC_STA_ADDR)
+                                               addr[0] = control;
+                                       else if (reg == (REG_MAC_STA_ADDR + 4))
+                                               addr[1] = control;
+                                       key_valid = false;
+                               } else if ((control & 0xff) == 0x5A) {
+                                       key_valid = true;
+                                       reg = (u16) (control >> 16);
+                               } else
+                                       break;
+                       } else
+                               /* read error */
+                               break;
+                       i += 4;
+               }
+
+               *(u32 *) &eth_addr[2] = swab32(addr[0]);
+               *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
+               if (is_valid_ether_addr(eth_addr)) {
+                       memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
+                       return 0;
+               }
+               return 1;
+       }
+
+       /* see if SPI FLAGS exist ? */
+       addr[0] = addr[1] = 0;
+       reg = 0;
+       key_valid = false;
+       i = 0;
+       while (1) {
+               if (atl1_spi_read(hw, i + 0x1f000, &control)) {
+                       if (key_valid) {
+                               if (reg == REG_MAC_STA_ADDR)
+                                       addr[0] = control;
+                               else if (reg == (REG_MAC_STA_ADDR + 4))
+                                       addr[1] = control;
+                               key_valid = false;
+                       } else if ((control & 0xff) == 0x5A) {
+                               key_valid = true;
+                               reg = (u16) (control >> 16);
+                       } else
+                               /* data end */
+                               break;
+               } else
+                       /* read error */
+                       break;
+               i += 4;
+       }
+
+       *(u32 *) &eth_addr[2] = swab32(addr[0]);
+       *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
+       if (is_valid_ether_addr(eth_addr)) {
+               memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
+               return 0;
+       }
+
+       /*
+        * On some motherboards, the MAC address is written by the
+        * BIOS directly to the MAC register during POST, and is
+        * not stored in eeprom.  If all else thus far has failed
+        * to fetch the permanent MAC address, try reading it directly.
+        */
+       addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
+       addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
+       *(u32 *) &eth_addr[2] = swab32(addr[0]);
+       *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
+       if (is_valid_ether_addr(eth_addr)) {
+               memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
+               return 0;
+       }
+
+       return 1;
+}
+
+/*
+ * Reads the adapter's MAC address from the EEPROM
+ * hw - Struct containing variables accessed by shared code
+ */
+s32 atl1_read_mac_addr(struct atl1_hw *hw)
+{
+       u16 i;
+
+       if (atl1_get_permanent_address(hw))
+               random_ether_addr(hw->perm_mac_addr);
+
+       for (i = 0; i < ETH_ALEN; i++)
+               hw->mac_addr[i] = hw->perm_mac_addr[i];
+       return 0;
+}
+
+/*
+ * Hashes an address to determine its location in the multicast table
+ * hw - Struct containing variables accessed by shared code
+ * mc_addr - the multicast address to hash
+ *
+ * atl1_hash_mc_addr
+ *  purpose
+ *      set hash value for a multicast address
+ *      hash calcu processing :
+ *          1. calcu 32bit CRC for multicast address
+ *          2. reverse crc with MSB to LSB
+ */
+u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
+{
+       u32 crc32, value = 0;
+       int i;
+
+       crc32 = ether_crc_le(6, mc_addr);
+       for (i = 0; i < 32; i++)
+               value |= (((crc32 >> i) & 1) << (31 - i));
+
+       return value;
+}
+
+/*
+ * Sets the bit in the multicast table corresponding to the hash value.
+ * hw - Struct containing variables accessed by shared code
+ * hash_value - Multicast address hash value
+ */
+void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
+{
+       u32 hash_bit, hash_reg;
+       u32 mta;
+
+       /*
+        * The HASH Table  is a register array of 2 32-bit registers.
+        * It is treated like an array of 64 bits.  We want to set
+        * bit BitArray[hash_value]. So we figure out what register
+        * the bit is in, read it, OR in the new bit, then write
+        * back the new value.  The register is determined by the
+        * upper 7 bits of the hash value and the bit within that
+        * register are determined by the lower 5 bits of the value.
+        */
+       hash_reg = (hash_value >> 31) & 0x1;
+       hash_bit = (hash_value >> 26) & 0x1F;
+       mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
+       mta |= (1 << hash_bit);
+       iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
+}
+
+/*
+ * Writes a value to a PHY register
+ * hw - Struct containing variables accessed by shared code
+ * reg_addr - address of the PHY register to write
+ * data - data to write to the PHY
+ */
+static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
+{
+       int i;
+       u32 val;
+
+       val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
+           (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
+           MDIO_SUP_PREAMBLE |
+           MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
+       iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
+       ioread32(hw->hw_addr + REG_MDIO_CTRL);
+
+       for (i = 0; i < MDIO_WAIT_TIMES; i++) {
+               udelay(2);
+               val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
+               if (!(val & (MDIO_START | MDIO_BUSY)))
+                       break;
+       }
+
+       if (!(val & (MDIO_START | MDIO_BUSY)))
+               return 0;
+
+       return ATLX_ERR_PHY;
+}
+
+/*
+ * Make L001's PHY out of Power Saving State (bug)
+ * hw - Struct containing variables accessed by shared code
+ * when power on, L001's PHY always on Power saving State
+ * (Gigabit Link forbidden)
+ */
+static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
+{
+       s32 ret;
+       ret = atl1_write_phy_reg(hw, 29, 0x0029);
+       if (ret)
+               return ret;
+       return atl1_write_phy_reg(hw, 30, 0);
+}
+
+/*
+ *TODO: do something or get rid of this
+ */
+#ifdef CONFIG_PM
+static s32 atl1_phy_enter_power_saving(struct atl1_hw *hw)
+{
+/*    s32 ret_val;
+ *    u16 phy_data;
+ */
+
+/*
+    ret_val = atl1_write_phy_reg(hw, ...);
+    ret_val = atl1_write_phy_reg(hw, ...);
+    ....
+*/
+       return 0;
+}
+#endif
+
+/*
+ * Resets the PHY and make all config validate
+ * hw - Struct containing variables accessed by shared code
+ *
+ * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
+ */
+static s32 atl1_phy_reset(struct atl1_hw *hw)
+{
+       struct pci_dev *pdev = hw->back->pdev;
+       struct atl1_adapter *adapter = hw->back;
+       s32 ret_val;
+       u16 phy_data;
+
+       if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
+           hw->media_type == MEDIA_TYPE_1000M_FULL)
+               phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
+       else {
+               switch (hw->media_type) {
+               case MEDIA_TYPE_100M_FULL:
+                       phy_data =
+                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
+                           MII_CR_RESET;
+                       break;
+               case MEDIA_TYPE_100M_HALF:
+                       phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
+                       break;
+               case MEDIA_TYPE_10M_FULL:
+                       phy_data =
+                           MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
+                       break;
+               default:
+                       /* MEDIA_TYPE_10M_HALF: */
+                       phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
+                       break;
+               }
+       }
+
+       ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
+       if (ret_val) {
+               u32 val;
+               int i;
+               /* pcie serdes link may be down! */
+               if (netif_msg_hw(adapter))
+                       dev_dbg(&pdev->dev, "pcie phy link down\n");
+
+               for (i = 0; i < 25; i++) {
+                       msleep(1);
+                       val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
+                       if (!(val & (MDIO_START | MDIO_BUSY)))
+                               break;
+               }
+
+               if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
+                       if (netif_msg_hw(adapter))
+                               dev_warn(&pdev->dev,
+                                       "pcie link down at least 25ms\n");
+                       return ret_val;
+               }
+       }
+       return 0;
+}
+
+/*
+ * Configures PHY autoneg and flow control advertisement settings
+ * hw - Struct containing variables accessed by shared code
+ */
+static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
+{
+       s32 ret_val;
+       s16 mii_autoneg_adv_reg;
+       s16 mii_1000t_ctrl_reg;
+
+       /* Read the MII Auto-Neg Advertisement Register (Address 4). */
+       mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
+
+       /* Read the MII 1000Base-T Control Register (Address 9). */
+       mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
+
+       /*
+        * First we clear all the 10/100 mb speed bits in the Auto-Neg
+        * Advertisement Register (Address 4) and the 1000 mb speed bits in
+        * the  1000Base-T Control Register (Address 9).
+        */
+       mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
+       mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
+
+       /*
+        * Need to parse media_type  and set up
+        * the appropriate PHY registers.
+        */
+       switch (hw->media_type) {
+       case MEDIA_TYPE_AUTO_SENSOR:
+               mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
+                                       MII_AR_10T_FD_CAPS |
+                                       MII_AR_100TX_HD_CAPS |
+                                       MII_AR_100TX_FD_CAPS);
+               mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
+               break;
+
+       case MEDIA_TYPE_1000M_FULL:
+               mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
+               break;
+
+       case MEDIA_TYPE_100M_FULL:
+               mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
+               break;
+
+       case MEDIA_TYPE_100M_HALF:
+               mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
+               break;
+
+       case MEDIA_TYPE_10M_FULL:
+               mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
+               break;
+
+       default:
+               mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
+               break;
+       }
+
+       /* flow control fixed to enable all */
+       mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
+
+       hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
+       hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
+
+       ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
+       if (ret_val)
+               return ret_val;
+
+       ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
+       if (ret_val)
+               return ret_val;
+
+       return 0;
+}
+
+/*
+ * Configures link settings.
+ * hw - Struct containing variables accessed by shared code
+ * Assumes the hardware has previously been reset and the
+ * transmitter and receiver are not enabled.
+ */
+static s32 atl1_setup_link(struct atl1_hw *hw)
+{
+       struct pci_dev *pdev = hw->back->pdev;
+       struct atl1_adapter *adapter = hw->back;
+       s32 ret_val;
+
+       /*
+        * Options:
+        *  PHY will advertise value(s) parsed from
+        *  autoneg_advertised and fc
+        *  no matter what autoneg is , We will not wait link result.
+        */
+       ret_val = atl1_phy_setup_autoneg_adv(hw);
+       if (ret_val) {
+               if (netif_msg_link(adapter))
+                       dev_dbg(&pdev->dev,
+                               "error setting up autonegotiation\n");
+               return ret_val;
+       }
+       /* SW.Reset , En-Auto-Neg if needed */
+       ret_val = atl1_phy_reset(hw);
+       if (ret_val) {
+               if (netif_msg_link(adapter))
+                       dev_dbg(&pdev->dev, "error resetting phy\n");
+               return ret_val;
+       }
+       hw->phy_configured = true;
+       return ret_val;
+}
+
+static void atl1_init_flash_opcode(struct atl1_hw *hw)
+{
+       if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
+               /* Atmel */
+               hw->flash_vendor = 0;
+
+       /* Init OP table */
+       iowrite8(flash_table[hw->flash_vendor].cmd_program,
+               hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
+       iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
+               hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
+       iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
+               hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
+       iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
+               hw->hw_addr + REG_SPI_FLASH_OP_RDID);
+       iowrite8(flash_table[hw->flash_vendor].cmd_wren,
+               hw->hw_addr + REG_SPI_FLASH_OP_WREN);
+       iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
+               hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
+       iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
+               hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
+       iowrite8(flash_table[hw->flash_vendor].cmd_read,
+               hw->hw_addr + REG_SPI_FLASH_OP_READ);
+}
+
+/*
+ * Performs basic configuration of the adapter.
+ * hw - Struct containing variables accessed by shared code
+ * Assumes that the controller has previously been reset and is in a
+ * post-reset uninitialized state. Initializes multicast table,
+ * and  Calls routines to setup link
+ * Leaves the transmit and receive units disabled and uninitialized.
+ */
+static s32 atl1_init_hw(struct atl1_hw *hw)
+{
+       u32 ret_val = 0;
+
+       /* Zero out the Multicast HASH table */
+       iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
+       /* clear the old settings from the multicast hash table */
+       iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
+
+       atl1_init_flash_opcode(hw);
+
+       if (!hw->phy_configured) {
+               /* enable GPHY LinkChange Interrrupt */
+               ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
+               if (ret_val)
+                       return ret_val;
+               /* make PHY out of power-saving state */
+               ret_val = atl1_phy_leave_power_saving(hw);
+               if (ret_val)
+                       return ret_val;
+               /* Call a subroutine to configure the link */
+               ret_val = atl1_setup_link(hw);
+       }
+       return ret_val;
+}
+
+/*
+ * Detects the current speed and duplex settings of the hardware.
+ * hw - Struct containing variables accessed by shared code
+ * speed - Speed of the connection
+ * duplex - Duplex setting of the connection
+ */
+static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
+{
+       struct pci_dev *pdev = hw->back->pdev;
+       struct atl1_adapter *adapter = hw->back;
+       s32 ret_val;
+       u16 phy_data;
+
+       /* ; --- Read   PHY Specific Status Register (17) */
+       ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
+       if (ret_val)
+               return ret_val;
+
+       if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
+               return ATLX_ERR_PHY_RES;
+
+       switch (phy_data & MII_ATLX_PSSR_SPEED) {
+       case MII_ATLX_PSSR_1000MBS:
+               *speed = SPEED_1000;
+               break;
+       case MII_ATLX_PSSR_100MBS:
+               *speed = SPEED_100;
+               break;
+       case MII_ATLX_PSSR_10MBS:
+               *speed = SPEED_10;
+               break;
+       default:
+               if (netif_msg_hw(adapter))
+                       dev_dbg(&pdev->dev, "error getting speed\n");
+               return ATLX_ERR_PHY_SPEED;
+               break;
+       }
+       if (phy_data & MII_ATLX_PSSR_DPLX)
+               *duplex = FULL_DUPLEX;
+       else
+               *duplex = HALF_DUPLEX;
+
+       return 0;
+}
+
+void atl1_set_mac_addr(struct atl1_hw *hw)
+{
+       u32 value;
+       /*
+        * 00-0B-6A-F6-00-DC
+        * 0:  6AF600DC   1: 000B
+        * low dword
+        */
+       value = (((u32) hw->mac_addr[2]) << 24) |
+           (((u32) hw->mac_addr[3]) << 16) |
+           (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
+       iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
+       /* high dword */
+       value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
+       iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
+}
+
 /*
  * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  * @adapter: board private structure to initialize
@@ -125,7 +830,7 @@ static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
 
        adapter->wol = 0;
        adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
-       adapter->ict = 50000;   /* 100ms */
+       adapter->ict = 50000;           /* 100ms */
        adapter->link_speed = SPEED_0;  /* hardware init */
        adapter->link_duplex = FULL_DUPLEX;
 
@@ -206,30 +911,12 @@ static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 }
 
 /*
- * atl1_ioctl -
- * @netdev:
- * @ifreq:
- * @cmd:
- */
-static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
-{
-       switch (cmd) {
-       case SIOCGMIIPHY:
-       case SIOCGMIIREG:
-       case SIOCSMIIREG:
-               return atl1_mii_ioctl(netdev, ifr, cmd);
-       default:
-               return -EOPNOTSUPP;
-       }
-}
-
-/*
  * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  * @adapter: board private structure
  *
  * Return 0 on success, negative on failure
  */
-s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
+static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
 {
        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
@@ -242,13 +929,16 @@ s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
        size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
        tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
        if (unlikely(!tpd_ring->buffer_info)) {
-               dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
+               if (netif_msg_drv(adapter))
+                       dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
+                               size);
                goto err_nomem;
        }
        rfd_ring->buffer_info =
                (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
 
-       /* real ring DMA buffer
+       /*
+        * real ring DMA buffer
         * each ring/block may need up to 8 bytes for alignment, hence the
         * additional 40 bytes tacked onto the end.
         */
@@ -263,7 +953,8 @@ s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
        ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
                &ring_header->dma);
        if (unlikely(!ring_header->desc)) {
-               dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
+               if (netif_msg_drv(adapter))
+                       dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
                goto err_nomem;
        }
 
@@ -307,7 +998,7 @@ s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
                ((u8 *) adapter->cmb.cmb +
                (sizeof(struct coals_msg_block) + offset));
 
-       return ATL1_SUCCESS;
+       return 0;
 
 err_nomem:
        kfree(tpd_ring->buffer_info);
@@ -416,7 +1107,7 @@ static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  *
  * Free all transmit software resources
  */
-void atl1_free_ring_resources(struct atl1_adapter *adapter)
+static void atl1_free_ring_resources(struct atl1_adapter *adapter)
 {
        struct pci_dev *pdev = adapter->pdev;
        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
@@ -481,31 +1172,6 @@ static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
        iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
 }
 
-/*
- * atl1_set_mac - Change the Ethernet Address of the NIC
- * @netdev: network interface device structure
- * @p: pointer to an address structure
- *
- * Returns 0 on success, negative on failure
- */
-static int atl1_set_mac(struct net_device *netdev, void *p)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct sockaddr *addr = p;
-
-       if (netif_running(netdev))
-               return -EBUSY;
-
-       if (!is_valid_ether_addr(addr->sa_data))
-               return -EADDRNOTAVAIL;
-
-       memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-       memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
-
-       atl1_set_mac_addr(&adapter->hw);
-       return 0;
-}
-
 static u32 atl1_check_link(struct atl1_adapter *adapter)
 {
        struct atl1_hw *hw = &adapter->hw;
@@ -517,14 +1183,17 @@ static u32 atl1_check_link(struct atl1_adapter *adapter)
        /* MII_BMSR must read twice */
        atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
        atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
-       if (!(phy_data & BMSR_LSTATUS)) {       /* link down */
-               if (netif_carrier_ok(netdev)) { /* old link state: Up */
-                       dev_info(&adapter->pdev->dev, "link is down\n");
+       if (!(phy_data & BMSR_LSTATUS)) {
+               /* link down */
+               if (netif_carrier_ok(netdev)) {
+                       /* old link state: Up */
+                       if (netif_msg_link(adapter))
+                               dev_info(&adapter->pdev->dev, "link is down\n");
                        adapter->link_speed = SPEED_0;
                        netif_carrier_off(netdev);
                        netif_stop_queue(netdev);
                }
-               return ATL1_SUCCESS;
+               return 0;
        }
 
        /* Link Up */
@@ -562,20 +1231,22 @@ static u32 atl1_check_link(struct atl1_adapter *adapter)
                        adapter->link_speed = speed;
                        adapter->link_duplex = duplex;
                        atl1_setup_mac_ctrl(adapter);
-                       dev_info(&adapter->pdev->dev,
-                               "%s link is up %d Mbps %s\n",
-                               netdev->name, adapter->link_speed,
-                               adapter->link_duplex == FULL_DUPLEX ?
-                               "full duplex" : "half duplex");
+                       if (netif_msg_link(adapter))
+                               dev_info(&adapter->pdev->dev,
+                                       "%s link is up %d Mbps %s\n",
+                                       netdev->name, adapter->link_speed,
+                                       adapter->link_duplex == FULL_DUPLEX ?
+                                       "full duplex" : "half duplex");
                }
-               if (!netif_carrier_ok(netdev)) {        /* Link down -> Up */
+               if (!netif_carrier_ok(netdev)) {
+                       /* Link down -> Up */
                        netif_carrier_on(netdev);
                        netif_wake_queue(netdev);
                }
-               return ATL1_SUCCESS;
+               return 0;
        }
 
-       /* change orignal link status */
+       /* change original link status */
        if (netif_carrier_ok(netdev)) {
                adapter->link_speed = SPEED_0;
                netif_carrier_off(netdev);
@@ -596,12 +1267,13 @@ static u32 atl1_check_link(struct atl1_adapter *adapter)
                        phy_data =
                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
                        break;
-               default:        /* MEDIA_TYPE_10M_HALF: */
+               default:
+                       /* MEDIA_TYPE_10M_HALF: */
                        phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
                        break;
                }
                atl1_write_phy_reg(hw, MII_BMCR, phy_data);
-               return ATL1_SUCCESS;
+               return 0;
        }
 
        /* auto-neg, insert timer to re-config phy */
@@ -610,103 +1282,6 @@ static u32 atl1_check_link(struct atl1_adapter *adapter)
                mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
        }
 
-       return ATL1_SUCCESS;
-}
-
-static void atl1_check_for_link(struct atl1_adapter *adapter)
-{
-       struct net_device *netdev = adapter->netdev;
-       u16 phy_data = 0;
-
-       spin_lock(&adapter->lock);
-       adapter->phy_timer_pending = false;
-       atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
-       atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
-       spin_unlock(&adapter->lock);
-
-       /* notify upper layer link down ASAP */
-       if (!(phy_data & BMSR_LSTATUS)) {       /* Link Down */
-               if (netif_carrier_ok(netdev)) { /* old link state: Up */
-                       dev_info(&adapter->pdev->dev, "%s link is down\n",
-                               netdev->name);
-                       adapter->link_speed = SPEED_0;
-                       netif_carrier_off(netdev);
-                       netif_stop_queue(netdev);
-               }
-       }
-       schedule_work(&adapter->link_chg_task);
-}
-
-/*
- * atl1_set_multi - Multicast and Promiscuous mode set
- * @netdev: network interface device structure
- *
- * The set_multi entry point is called whenever the multicast address
- * list or the network interface flags are updated.  This routine is
- * responsible for configuring the hardware for proper multicast,
- * promiscuous mode, and all-multi behavior.
- */
-static void atl1_set_multi(struct net_device *netdev)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       struct atl1_hw *hw = &adapter->hw;
-       struct dev_mc_list *mc_ptr;
-       u32 rctl;
-       u32 hash_value;
-
-       /* Check for Promiscuous and All Multicast modes */
-       rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
-       if (netdev->flags & IFF_PROMISC)
-               rctl |= MAC_CTRL_PROMIS_EN;
-       else if (netdev->flags & IFF_ALLMULTI) {
-               rctl |= MAC_CTRL_MC_ALL_EN;
-               rctl &= ~MAC_CTRL_PROMIS_EN;
-       } else
-               rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
-
-       iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
-
-       /* clear the old settings from the multicast hash table */
-       iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
-       iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
-
-       /* compute mc addresses' hash value ,and put it into hash table */
-       for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
-               hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
-               atl1_hash_set(hw, hash_value);
-       }
-}
-
-/*
- * atl1_change_mtu - Change the Maximum Transfer Unit
- * @netdev: network interface device structure
- * @new_mtu: new value for maximum frame size
- *
- * Returns 0 on success, negative on failure
- */
-static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       int old_mtu = netdev->mtu;
-       int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
-
-       if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
-           (max_frame > MAX_JUMBO_FRAME_SIZE)) {
-               dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
-               return -EINVAL;
-       }
-
-       adapter->hw.max_frame_size = max_frame;
-       adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
-       adapter->rx_buffer_len = (max_frame + 7) & ~7;
-       adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
-
-       netdev->mtu = new_mtu;
-       if ((old_mtu != new_mtu) && netif_running(netdev)) {
-               atl1_down(adapter);
-               atl1_up(adapter);
-       }
-
        return 0;
 }
 
@@ -974,37 +1549,6 @@ static void atl1_via_workaround(struct atl1_adapter *adapter)
        iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
 }
 
-/*
- * atl1_irq_enable - Enable default interrupt generation settings
- * @adapter: board private structure
- */
-static void atl1_irq_enable(struct atl1_adapter *adapter)
-{
-       iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
-       ioread32(adapter->hw.hw_addr + REG_IMR);
-}
-
-/*
- * atl1_irq_disable - Mask off interrupt generation on the NIC
- * @adapter: board private structure
- */
-static void atl1_irq_disable(struct atl1_adapter *adapter)
-{
-       iowrite32(0, adapter->hw.hw_addr + REG_IMR);
-       ioread32(adapter->hw.hw_addr + REG_IMR);
-       synchronize_irq(adapter->pdev->irq);
-}
-
-static void atl1_clear_phy_int(struct atl1_adapter *adapter)
-{
-       u16 phy_data;
-       unsigned long flags;
-
-       spin_lock_irqsave(&adapter->lock, flags);
-       atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
-       spin_unlock_irqrestore(&adapter->lock, flags);
-}
-
 static void atl1_inc_smb(struct atl1_adapter *adapter)
 {
        struct stats_msg_block *smb = adapter->smb.smb;
@@ -1076,19 +1620,6 @@ static void atl1_inc_smb(struct atl1_adapter *adapter)
                adapter->soft_stats.tx_carrier_errors;
 }
 
-/*
- * atl1_get_stats - Get System Network Statistics
- * @netdev: network interface device structure
- *
- * Returns the address of the device statistics structure.
- * The statistics are actually updated from the timer callback.
- */
-static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
-{
-       struct atl1_adapter *adapter = netdev_priv(netdev);
-       return &adapter->net_stats;
-}
-
 static void atl1_update_mailbox(struct atl1_adapter *adapter)
 {
        unsigned long flags;
@@ -1150,8 +1681,9 @@ static void atl1_rx_checksum(struct atl1_adapter *adapter,
                if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
                                        ERR_FLAG_CODE | ERR_FLAG_OV)) {
                        adapter->hw_csum_err++;
-                       dev_printk(KERN_DEBUG, &pdev->dev,
-                               "rx checksum error\n");
+                       if (netif_msg_rx_err(adapter))
+                               dev_printk(KERN_DEBUG, &pdev->dev,
+                                       "rx checksum error\n");
                        return;
                }
        }
@@ -1170,9 +1702,10 @@ static void atl1_rx_checksum(struct atl1_adapter *adapter,
        }
 
        /* IPv4, but hardware thinks its checksum is wrong */
-       dev_printk(KERN_DEBUG, &pdev->dev,
-               "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
-               rrd->pkt_flg, rrd->err_flg);
+       if (netif_msg_rx_err(adapter))
+               dev_printk(KERN_DEBUG, &pdev->dev,
+                       "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
+                       rrd->pkt_flg, rrd->err_flg);
        skb->ip_summed = CHECKSUM_COMPLETE;
        skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
        adapter->hw_csum_err++;
@@ -1210,7 +1743,8 @@ static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
                rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
 
                skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
-               if (unlikely(!skb)) {   /* Better luck next round */
+               if (unlikely(!skb)) {
+                       /* Better luck next round */
                        adapter->net_stats.rx_dropped++;
                        break;
                }
@@ -1281,18 +1815,39 @@ chk_rrd:
                        /* check rrd status */
                        if (likely(rrd->num_buf == 1))
                                goto rrd_ok;
+                       else if (netif_msg_rx_err(adapter)) {
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "unexpected RRD buffer count\n");
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "rx_buf_len = %d\n",
+                                       adapter->rx_buffer_len);
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "RRD num_buf = %d\n",
+                                       rrd->num_buf);
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "RRD pkt_len = %d\n",
+                                       rrd->xsz.xsum_sz.pkt_size);
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "RRD pkt_flg = 0x%08X\n",
+                                       rrd->pkt_flg);
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "RRD err_flg = 0x%08X\n",
+                                       rrd->err_flg);
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "RRD vlan_tag = 0x%08X\n",
+                                       rrd->vlan_tag);
+                       }
 
                        /* rrd seems to be bad */
                        if (unlikely(i-- > 0)) {
                                /* rrd may not be DMAed completely */
-                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
-                                       "incomplete RRD DMA transfer\n");
                                udelay(1);
                                goto chk_rrd;
                        }
                        /* bad rrd */
-                       dev_printk(KERN_DEBUG, &adapter->pdev->dev,
-                               "bad RRD\n");
+                       if (netif_msg_rx_err(adapter))
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "bad RRD\n");
                        /* see if update RFD index */
                        if (rrd->num_buf > 1)
                                atl1_update_rfd_index(adapter, rrd);
@@ -1411,8 +1966,6 @@ static void atl1_intr_tx(struct atl1_adapter *adapter)
                        dev_kfree_skb_irq(buffer_info->skb);
                        buffer_info->skb = NULL;
                }
-               tpd->buffer_addr = 0;
-               tpd->desc.data = 0;
 
                if (++sw_tpd_next_to_clean == tpd_ring->count)
                        sw_tpd_next_to_clean = 0;
@@ -1434,167 +1987,192 @@ static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
 }
 
 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
-                        struct tso_param *tso)
+       struct tx_packet_desc *ptpd)
 {
-       /* We enter this function holding a spinlock. */
-       u8 ipofst;
+       /* spinlock held */
+       u8 hdr_len, ip_off;
+       u32 real_len;
        int err;
 
        if (skb_shinfo(skb)->gso_size) {
                if (skb_header_cloned(skb)) {
                        err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
                        if (unlikely(err))
-                               return err;
+                               return -1;
                }
 
                if (skb->protocol == ntohs(ETH_P_IP)) {
                        struct iphdr *iph = ip_hdr(skb);
 
-                       iph->tot_len = 0;
+                       real_len = (((unsigned char *)iph - skb->data) +
+                               ntohs(iph->tot_len));
+                       if (real_len < skb->len)
+                               pskb_trim(skb, real_len);
+                       hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
+                       if (skb->len == hdr_len) {
+                               iph->check = 0;
+                               tcp_hdr(skb)->check =
+                                       ~csum_tcpudp_magic(iph->saddr,
+                                       iph->daddr, tcp_hdrlen(skb),
+                                       IPPROTO_TCP, 0);
+                               ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
+                                       TPD_IPHL_SHIFT;
+                               ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
+                                       TPD_TCPHDRLEN_MASK) <<
+                                       TPD_TCPHDRLEN_SHIFT;
+                               ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
+                               ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
+                               return 1;
+                       }
+
                        iph->check = 0;
                        tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
-                               iph->daddr, 0, IPPROTO_TCP, 0);
-                       ipofst = skb_network_offset(skb);
-                       if (ipofst != ETH_HLEN) /* 802.3 frame */
-                               tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
-
-                       tso->tsopl |= (iph->ihl &
-                               CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
-                       tso->tsopl |= (tcp_hdrlen(skb) &
-                               TSO_PARAM_TCPHDRLEN_MASK) <<
-                               TSO_PARAM_TCPHDRLEN_SHIFT;
-                       tso->tsopl |= (skb_shinfo(skb)->gso_size &
-                               TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
-                       tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
-                       tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
-                       tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
-                       return true;
+                                       iph->daddr, 0, IPPROTO_TCP, 0);
+                       ip_off = (unsigned char *)iph -
+                               (unsigned char *) skb_network_header(skb);
+                       if (ip_off == 8) /* 802.3-SNAP frame */
+                               ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
+                       else if (ip_off != 0)
+                               return -2;
+
+                       ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
+                               TPD_IPHL_SHIFT;
+                       ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
+                               TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
+                       ptpd->word3 |= (skb_shinfo(skb)->gso_size &
+                               TPD_MSS_MASK) << TPD_MSS_SHIFT;
+                       ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
+                       return 3;
                }
        }
        return false;
 }
 
 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
-       struct csum_param *csum)
+       struct tx_packet_desc *ptpd)
 {
        u8 css, cso;
 
        if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
-               cso = skb_transport_offset(skb);
-               css = cso + skb->csum_offset;
-               if (unlikely(cso & 0x1)) {
-                       dev_printk(KERN_DEBUG, &adapter->pdev->dev,
-                               "payload offset not an even number\n");
+               css = (u8) (skb->csum_start - skb_headroom(skb));
+               cso = css + (u8) skb->csum_offset;
+               if (unlikely(css & 0x1)) {
+                       /* L1 hardware requires an even number here */
+                       if (netif_msg_tx_err(adapter))
+                               dev_printk(KERN_DEBUG, &adapter->pdev->dev,
+                                       "payload offset not an even number\n");
                        return -1;
                }
-               csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
-                       CSUM_PARAM_PLOADOFFSET_SHIFT;
-               csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
-                       CSUM_PARAM_XSUMOFFSET_SHIFT;
-               csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
+               ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
+                       TPD_PLOADOFFSET_SHIFT;
+               ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
+                       TPD_CCSUMOFFSET_SHIFT;
+               ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
                return true;
        }
-
-       return true;
+       return 0;
 }
 
 static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
-       bool tcp_seg)
+       struct tx_packet_desc *ptpd)
 {
-       /* We enter this function holding a spinlock. */
+       /* spinlock held */
        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
        struct atl1_buffer *buffer_info;
+       u16 buf_len = skb->len;
        struct page *page;
-       int first_buf_len = skb->len;
        unsigned long offset;
        unsigned int nr_frags;
        unsigned int f;
-       u16 tpd_next_to_use;
-       u16 proto_hdr_len;
-       u16 len12;
+       int retval;
+       u16 next_to_use;
+       u16 data_len;
+       u8 hdr_len;
 
-       first_buf_len -= skb->data_len;
+       buf_len -= skb->data_len;
        nr_frags = skb_shinfo(skb)->nr_frags;
-       tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
-       buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
+       next_to_use = atomic_read(&tpd_ring->next_to_use);
+       buffer_info = &tpd_ring->buffer_info[next_to_use];
        if (unlikely(buffer_info->skb))
                BUG();
-       buffer_info->skb = NULL;        /* put skb in last TPD */
-
-       if (tcp_seg) {
-               /* TSO/GSO */
-               proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
-               buffer_info->length = proto_hdr_len;
+       /* put skb in last TPD */
+       buffer_info->skb = NULL;
+
+       retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
+       if (retval) {
+               /* TSO */
+               hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
+               buffer_info->length = hdr_len;
                page = virt_to_page(skb->data);
                offset = (unsigned long)skb->data & ~PAGE_MASK;
                buffer_info->dma = pci_map_page(adapter->pdev, page,
-                                               offset, proto_hdr_len,
+                                               offset, hdr_len,
                                                PCI_DMA_TODEVICE);
 
-               if (++tpd_next_to_use == tpd_ring->count)
-                       tpd_next_to_use = 0;
+               if (++next_to_use == tpd_ring->count)
+                       next_to_use = 0;
 
-               if (first_buf_len > proto_hdr_len) {
-                       int i, m;
+               if (buf_len > hdr_len) {
+                       int i, nseg;
 
-                       len12 = first_buf_len - proto_hdr_len;
-                       m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
+                       data_len = buf_len - hdr_len;
+                       nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
                                ATL1_MAX_TX_BUF_LEN;
-                       for (i = 0; i < m; i++) {
+                       for (i = 0; i < nseg; i++) {
                                buffer_info =
-                                   &tpd_ring->buffer_info[tpd_next_to_use];
+                                   &tpd_ring->buffer_info[next_to_use];
                                buffer_info->skb = NULL;
                                buffer_info->length =
                                    (ATL1_MAX_TX_BUF_LEN >=
-                                    len12) ? ATL1_MAX_TX_BUF_LEN : len12;
-                               len12 -= buffer_info->length;
+                                    data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
+                               data_len -= buffer_info->length;
                                page = virt_to_page(skb->data +
-                                       (proto_hdr_len +
-                                       i * ATL1_MAX_TX_BUF_LEN));
+                                       (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
                                offset = (unsigned long)(skb->data +
-                                       (proto_hdr_len +
-                                       i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
+                                       (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
+                                       ~PAGE_MASK;
                                buffer_info->dma = pci_map_page(adapter->pdev,
                                        page, offset, buffer_info->length,
                                        PCI_DMA_TODEVICE);
-                               if (++tpd_next_to_use == tpd_ring->count)
-                                       tpd_next_to_use = 0;
+                               if (++next_to_use == tpd_ring->count)
+                                       next_to_use = 0;
                        }
                }
        } else {
-               /* not TSO/GSO */
-               buffer_info->length = first_buf_len;
+               /* not TSO */
+               buffer_info->length = buf_len;
                page = virt_to_page(skb->data);
                offset = (unsigned long)skb->data & ~PAGE_MASK;
                buffer_info->dma = pci_map_page(adapter->pdev, page,
-                       offset, first_buf_len, PCI_DMA_TODEVICE);
-               if (++tpd_next_to_use == tpd_ring->count)
-                       tpd_next_to_use = 0;
+                       offset, buf_len, PCI_DMA_TODEVICE);
+               if (++next_to_use == tpd_ring->count)
+                       next_to_use = 0;
        }
 
        for (f = 0; f < nr_frags; f++) {
                struct skb_frag_struct *frag;
-               u16 lenf, i, m;
+               u16 i, nseg;
 
                frag = &skb_shinfo(skb)->frags[f];
-               lenf = frag->size;
+               buf_len = frag->size;
 
-               m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
-               for (i = 0; i < m; i++) {
-                       buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
+               nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
+                       ATL1_MAX_TX_BUF_LEN;
+               for (i = 0; i < nseg; i++) {
+                       buffer_info = &tpd_ring->buffer_info[next_to_use];
                        if (unlikely(buffer_info->skb))
                                BUG();
                        buffer_info->skb = NULL;
-                       buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
-                               ATL1_MAX_TX_BUF_LEN : lenf;
-                       lenf -= buffer_info->length;
+                       buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
+                               ATL1_MAX_TX_BUF_LEN : buf_len;
+                       buf_len -= buffer_info->length;
                        buffer_info->dma = pci_map_page(adapter->pdev,
                                frag->page,
                                frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
                                buffer_info->length, PCI_DMA_TODEVICE);
 
-                       if (++tpd_next_to_use == tpd_ring->count)
-                               tpd_next_to_use = 0;
+                       if (++next_to_use == tpd_ring->count)
+                               next_to_use = 0;
                }
        }
 
@@ -1602,39 +2180,44 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
        buffer_info->skb = skb;
 }
 
-static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
-       union tpd_descr *descr)
+static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
+       struct tx_packet_desc *ptpd)
 {
-       /* We enter this function holding a spinlock. */
+       /* spinlock held */
        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
-       int j;
-       u32 val;
        struct atl1_buffer *buffer_info;
        struct tx_packet_desc *tpd;
-       u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
+       u16 j;
+       u32 val;
+       u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
 
        for (j = 0; j < count; j++) {
-               buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
-               tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
-               tpd->desc.csum.csumpu = descr->csum.csumpu;
-               tpd->desc.csum.csumpl = descr->csum.csumpl;
-               tpd->desc.tso.tsopu = descr->tso.tsopu;
-               tpd->desc.tso.tsopl = descr->tso.tsopl;
+               buffer_info = &tpd_ring->buffer_info[next_to_use];
+               tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
+               if (tpd != ptpd)
+                       memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
                tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
-               tpd->desc.data = descr->data;
-               tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
-                       CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
+               tpd->word2 = (cpu_to_le16(buffer_info->length) &
+                       TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
 
-               val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
-                       TSO_PARAM_SEGMENT_MASK;
-               if (val && !j)
-                       tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
+               /*
+                * if this is the first packet in a TSO chain, set
+                * TPD_HDRFLAG, otherwise, clear it.
+                */
+               val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
+                       TPD_SEGMENT_EN_MASK;
+               if (val) {
+                       if (!j)
+                               tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
+                       else
+                               tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
+               }
 
                if (j == (count - 1))
-                       tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
+                       tpd->word3 |= 1 << TPD_EOP_SHIFT;
 
-               if (++tpd_next_to_use == tpd_ring->count)
-                       tpd_next_to_use = 0;
+               if (++next_to_use == tpd_ring->count)
+                       next_to_use = 0;
        }
        /*
         * Force memory writes to complete before letting h/w
@@ -1644,18 +2227,18 @@ static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
         */
        wmb();
 
-       atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
+       atomic_set(&tpd_ring->next_to_use, next_to_use);
 }
 
 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 {
        struct atl1_adapter *adapter = netdev_priv(netdev);
+       struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
        int len = skb->len;
        int tso;
        int count = 1;
        int ret_val;
-       u32 val;
-       union tpd_descr param;
+       struct tx_packet_