ARM: tegra: use irq name XUSB instead of USB3
Ajay Gupta [Tue, 29 Jan 2013 01:16:51 +0000 (17:16 -0800)]
This is to avoid confusion between EHCI and XUSB as
USB3 implies ehci host controller #3

BUG 1057074

Change-Id: I6fd6dbdf8bc41e7892cad719e3d9f02d193a70e5
Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/196146
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>

arch/arm/mach-tegra/devices.c
arch/arm/mach-tegra/include/mach/irqs.h

index db4e168..18247d6 100644 (file)
@@ -929,8 +929,8 @@ static struct resource tegra_xusb_resources[] = {
        [3] = DEFINE_RES_MEM_NAMED(TEGRA_XUSB_PADCTL_BASE,
                        TEGRA_XUSB_PADCTL_SIZE, "padctl"),
        [4] = DEFINE_RES_MEM_NAMED(TEGRA_PMC_BASE, TEGRA_PMC_SIZE, "pmc"),
-       [5] = DEFINE_RES_IRQ_NAMED(INT_USB3_HOST_INT, "host"),
-       [6] = DEFINE_RES_IRQ_NAMED(INT_USB3_HOST_SMI, "host-smi"),
+       [5] = DEFINE_RES_IRQ_NAMED(INT_XUSB_HOST_INT, "host"),
+       [6] = DEFINE_RES_IRQ_NAMED(INT_XUSB_HOST_SMI, "host-smi"),
        [7] = DEFINE_RES_IRQ_NAMED(INT_XUSB_PADCTL, "padctl"),
        [8] = DEFINE_RES_IRQ_NAMED(INT_USB3, "usb3"),
 };
index 0b6d264..3282134 100644 (file)
 #define INT_UARTA                      (INT_SEC_BASE + 4)
 #define INT_UARTB                      (INT_SEC_BASE + 5)
 #define INT_I2C                                (INT_SEC_BASE + 6)
-#define INT_USB3_HOST_INT              (INT_SEC_BASE + 7)
-#define INT_USB3_HOST_SMI              (INT_SEC_BASE + 8)
+#define INT_XUSB_HOST_INT              (INT_SEC_BASE + 7)
+#define INT_XUSB_HOST_SMI              (INT_SEC_BASE + 8)
 #define INT_TMR3                       (INT_SEC_BASE + 9)
 #define INT_TMR4                       (INT_SEC_BASE + 10)
 #define INT_USB3_HOST_PME              (INT_SEC_BASE + 11)