ARM: tegra: cardhu:Use PLL_C for sdmmc1
authorPavan Kunapuli <pkunapuli@nvidia.com>
Fri, 18 Feb 2011 13:01:54 +0000 (18:01 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Thu, 1 Dec 2011 05:45:37 +0000 (21:45 -0800)
commitfbcb5dc7d1b337795383ef51d2c5b98cd5dd177c
tree0b96e7c610f632cb090450b91e7a68d8c54efac9
parent31d1195205c261ebe495cb1951c6e5ade31eba0a
ARM: tegra: cardhu:Use PLL_C for sdmmc1

PLL_C can generate 208 MHz clock for SDMMC1.
SD 3.0 cards can work at 208 MHz. Increase sdmmc1
frequency to 208 MHz.

Bug 661035

Original-Change-Id: I7afa110de4d77183c959a53b1fab31fdec37e193
Reviewed-on: http://git-master/r/20045
Reviewed-by: Venkata Nageswara Penumarty <vpenumarty@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Original-Change-Id: I46dbac5135c5419a93d05285aa46acaf2601efc2

Rebase-Id: Rfa4a90ccccdcfb6e2c65a68c02c20390a9d3fd89
arch/arm/mach-tegra/board-cardhu-sdhci.c