arm: tegra: cardhu: Set AVDD_PLL and AVDD_PLL_SATA to proper voltage
authorLaxman Dewangan <ldewangan@nvidia.com>
Fri, 15 Jul 2011 09:06:16 +0000 (14:06 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 02:57:18 +0000 (19:57 -0700)
commitf3249999a60b0d5c7cedd5cde4643aac6443b4b4
treef88efb965495616820befb944a2010563b53d0cd
parentc6246e458f87561daf707501a347923c588ed504
arm: tegra: cardhu: Set AVDD_PLL and AVDD_PLL_SATA to proper voltage

Setting the rail voltage of the AVDD_PLLs to 1.2V and rail voltage
of PLL_SATA to 1.05V.

Original-Change-Id: Ibf5bb1d11b7b15cabb68f90da7e24dd999915c55
Reviewed-on: http://git-master/r/41179
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

Rebase-Id: Rc7f949b56c0d12d63f313aa005c4e71cbd0a3215
arch/arm/mach-tegra/board-cardhu-power.c