ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point
authorAlex Frid <afrid@nvidia.com>
Thu, 6 Dec 2012 07:41:19 +0000 (23:41 -0800)
committerRohan Somvanshi <rsomvanshi@nvidia.com>
Tue, 18 Dec 2012 13:35:19 +0000 (05:35 -0800)
commitf115428fa770a05ee001917d430f238e600a8c9b
treea343c65ec857fe095bd8a5749dc28f4226cf8901
parent0930dc9aa8d43b331906bbe1e5fb317dc16f66f1
ARM: tegra11: dvfs: Add CPU rail DFLL mode trip-point

Added CPU rail DFLL mode trip-point necessary to limit minimum CPU
voltage at cold temperature. The respective cooling device is not
implemented, yet.

Bug 1177204

Change-Id: I6abe1bc3ace81935c25968385af1998052455da0
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/168999
(cherry picked from commit d4f6d935f8e616852cfe83cc19cadf137169b239)
Reviewed-on: http://git-master/r/171628
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/mach-tegra/board-dalmore-sensors.c
arch/arm/mach-tegra/board-pluto-sensors.c
arch/arm/mach-tegra/board-roth-sensors.c
arch/arm/mach-tegra/dvfs.c
arch/arm/mach-tegra/dvfs.h
arch/arm/mach-tegra/tegra11_dvfs.c