perf_events: Update Intel extra regs shared constraints management
authorStephane Eranian <eranian@google.com>
Mon, 6 Jun 2011 14:57:03 +0000 (16:57 +0200)
committerIngo Molnar <mingo@elte.hu>
Fri, 1 Jul 2011 09:06:36 +0000 (11:06 +0200)
commitefc9f05df2dd171280dcb736a4d973ffefd5508e
treeccc1cee8f1cc0ad5391732eb3637b685b4b155a0
parenta7ac67ea021b4603095d2aa458bc41641238f22c
perf_events: Update Intel extra regs shared constraints management

This patch improves the code managing the extra shared registers
used for offcore_response events on Intel Nehalem/Westmere. The
idea is to use static allocation instead of dynamic allocation.
This simplifies greatly the get and put constraint routines for
those events.

The patch also renames per_core to shared_regs because the same
data structure gets used whether or not HT is on. When HT is
off, those events still need to coordination because they use
a extra MSR that has to be shared within an event group.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20110606145703.GA7258@quad
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event.c
arch/x86/kernel/cpu/perf_event_intel.c
include/linux/perf_event.h