serial: tegra: Check tx fifo status before writing
authorPradeep Goudagunta <pgoudagunta@nvidia.com>
Wed, 10 Aug 2011 12:09:51 +0000 (17:09 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Thu, 1 Dec 2011 05:48:10 +0000 (21:48 -0800)
commite7f18ba15667a2ee3cedbc39891095557f53c08d
treeefa32b659104859a63e37029de20cbbe882de493
parent94ce60fa064d84038535da58070cd33c76b4fec0
serial: tegra: Check tx fifo status before writing

TX fifo should be checked before writing into it, if it is full then stop
writing.

Bug 847599

Original-Change-Id: I12c654e3709fe42ec3494d90ac4fa256a790e9b5
Reviewed-on: http://git-master/r/46351
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

Rebase-Id: R6e82e11cfa4924b4ceb06fb753905e328f6a4dcd
drivers/tty/serial/tegra_hsuart.c