ARM: tegra: dvfs: Update Tegra3 EMC DFS
authorAlex Frid <afrid@nvidia.com>
Thu, 9 Jun 2011 01:39:10 +0000 (18:39 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 02:57:10 +0000 (19:57 -0700)
commite2b673e2e019ab0a43ebbbcaca63a2f8c3d858d3
tree3b1125a10c46a11673f8f423533a65ecb2dc94a8
parenta85dc87bb6a703b53d70295bfca93a3708b36929
ARM: tegra: dvfs: Update Tegra3 EMC DFS

Updated Tegra3 EMC DFS table to match new PLLP base frequency
(408MHz)  and enable power saving features.

Bug 836260

Change-Id: Ie85cda67804ea29a0df475464020b1e76176ea3b
Reviewed-on: http://git-master/r/36049
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>

Rebase-Id: Rdbb0343817c2aee5506f5ca78ead4807d4c76182
arch/arm/mach-tegra/board-cardhu-memory.c