ARM: tegra: clock: Allow Tegra3 PLLM rate change
authorAlex Frid <afrid@nvidia.com>
Sun, 24 Jun 2012 06:50:54 +0000 (23:50 -0700)
committerRohan Somvanshi <rsomvanshi@nvidia.com>
Fri, 13 Jul 2012 12:48:41 +0000 (05:48 -0700)
commitc9ce3ff77d029d99ddae5577b8358258feff08a0
tree536d68b03b7961e53813b4b93147f8562df3fd53
parent3eeffbc3d34d05b668234306a7de2e157db9b8db
ARM: tegra: clock: Allow Tegra3 PLLM rate change

Allowed Tegra3 memory PLLM rate change, provided it is disabled.

Since PLLM can deviate from boot configuration now, and on Tegra3 it
is controlled by PMC override registers (not CAR module registers):

- Re-factored PLLM initialization, resume, and set rate operations
accordingly (enable and disable ops already used PMC override).

- Made sure that boot configuration is restored on entry to LP0 to
match memory timing saved in scratch registers.

Bug 1005576

Change-Id: Iac6297455bec709a8e12d71deccab62c18905ea7
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/110937
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
(cherry picked from commit b53f88c68543a2b0ddb4545bb3b389b42eeb95d8)
Reviewed-on: http://git-master/r/114759
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/mach-tegra/sleep-t3.S
arch/arm/mach-tegra/sleep.h
arch/arm/mach-tegra/tegra3_clocks.c