video: tegra: dc: synchronize dsi clock-gating
authorRakesh Iyer <riyer@nvidia.com>
Thu, 19 Jul 2012 19:44:08 +0000 (12:44 -0700)
committerLokesh Pathak <lpathak@nvidia.com>
Wed, 25 Jul 2012 10:32:19 +0000 (03:32 -0700)
commitbf132a4184143d5780ca747d024768e021b590d5
treea5d4283ba1507390969ba11054ec9860b12ece1c
parent786ba00860c7dc3143c62bcbe5d371203238cd1d
video: tegra: dc: synchronize dsi clock-gating

The one shot thread will clock gate the modules periodically. This will ensure
relevant paths in dc driver have an active dc clock and dsi host.

Bug 1013172

Change-Id: Ibb505e35044f31405c06cb9fa0d6fdf78aafd4a6
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-on: http://git-master/r/117137
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
arch/arm/mach-tegra/include/mach/dc.h
drivers/video/tegra/dc/csc.c
drivers/video/tegra/dc/dc.c
drivers/video/tegra/dc/dc_priv.h
drivers/video/tegra/dc/dsi.c
drivers/video/tegra/dc/nvsd.c
drivers/video/tegra/dc/window.c