video: tegra: camera: VI clock changes
authorBhushan Rayrikar <brayrikar@nvidia.com>
Wed, 21 Aug 2013 18:19:02 +0000 (11:19 -0700)
committerMrutyunjay Sawant <msawant@nvidia.com>
Tue, 3 Sep 2013 07:25:51 +0000 (00:25 -0700)
commitb5a27d6eab8095fc043c51541465712b0a3bda5a
tree027ade43b3cd0f9c1b27207ceb73fbfe736aa5f8
parent318c456ae7509ca2286200ace7e8cddaff6a2fab
video: tegra: camera: VI clock changes

Use pll_c and pll_p both as parents for VI. Needed to select the
lowest clock rate greater than the required clock to improve power.

Bug 1350635

Change-Id: Ia684f9c2bcbf6342d7d02343f42a22f33940c4a3
Signed-off-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-on: http://git-master/r/266214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sean Pieper <spieper@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
drivers/video/tegra/camera/camera.c
drivers/video/tegra/camera/camera_clk.c
drivers/video/tegra/camera/camera_clk.h
drivers/video/tegra/camera/camera_priv_defs.h