ARM: tegra11x: Raise clock rate for C1NC power gating
authorBo Yan <byan@nvidia.com>
Tue, 15 Jan 2013 22:06:27 +0000 (14:06 -0800)
committerRiham Haidar <rhaidar@nvidia.com>
Fri, 25 Jan 2013 23:42:13 +0000 (15:42 -0800)
commita71665bb3ddb437536cec00be91e9b201414fc93
treef9f564d5fa245f5fea76d187f90547ac3c30e55e
parent1a80f0dbe95c35ba6a9a5132675c64db557b26e3
ARM: tegra11x: Raise clock rate for C1NC power gating

The C1NC power gating has long latency when slow cpu runs at very
low clock rate. Raising it to 204MHz can reduce this latency
significantly. The CPU clock is reverted back to its original value
once slow CPU wakes up.

bug 1177454

Change-Id: Idc6122f0a2ba8ad35c963942c60e9cf4a4f0b0c2
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/193501
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
arch/arm/mach-tegra/cpuidle-t11x.c