ARM: tegra11: dvfs: Round up CPU dvfs frequency list
authorAlex Frid <afrid@nvidia.com>
Sat, 29 Sep 2012 04:52:11 +0000 (21:52 -0700)
committerSimone Willett <swillett@nvidia.com>
Mon, 22 Oct 2012 20:56:51 +0000 (13:56 -0700)
commita2e058e8abfa328dcd6f82ac8e662090aaaf95a6
tree6e1779f3f329476ec393f9960cce48ab3b0778d9
parent1ee632fa39ef0fd73e567e4dfe9b557bc1d9f66f
ARM: tegra11: dvfs: Round up CPU dvfs frequency list

When predicted cpu voltage in dfll mode crosses maximum limit, keep
the respective frequency in the dvfs table ("round the list up"). The
voltage limit will be enforced anyway, and when the top frequency is
requested dfll will settle at whatever high rate it can reach on the
particular chip.

This change is relevant only until cvb coefficients characterization
is completed. With production coefficients predicted voltage will
never exceed maximum limit.

Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/139929
(cherry picked from commit 4adbd45cddd9efdbc12e0e668cf562aca3bed38d)

Change-Id: I7bb034d193385b726742d7ee1ff83a5ade8f63cf
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/146259
Reviewed-by: Automatic_Commit_Validation_User
arch/arm/mach-tegra/tegra11_dvfs.c