spi: tegra: synchronize PPSB late write
authorLaxman Dewangan <ldewangan@nvidia.com>
Wed, 23 May 2012 13:38:23 +0000 (18:38 +0530)
committerSimone Willett <swillett@nvidia.com>
Thu, 24 May 2012 01:42:46 +0000 (18:42 -0700)
commit9ef3e8ecc0f1c9a3bfad7c9f4d6a496c4a67924c
tree5d0803349222c26b2af3c39b3516929ec08c7087
parent2f8a84dcc28dfb3fc9638dadc6692b8f96c5bb77
spi: tegra: synchronize PPSB late write

When any write is made to PPSB register, it take time
to actual happen in the register due to ARM-PPSB design.
Delay or readback is required to make sure that write is
completed. There is no worst case guaranteed delay and hence
doing the register read to make write completes actually.

Change-Id: Iefd25115e1a9f02c64e83f11a4e249ad9d086d16
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102207
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
drivers/spi/spi-tegra.c