ARM: tegra: whistler: sdmmc2 controller clock to 25MHz
authorrgoyal <rgoyal@nvidia.com>
Thu, 6 Jan 2011 07:08:20 +0000 (12:08 +0530)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 04:14:06 +0000 (21:14 -0700)
commit96221d1251f3b934aaf9f3682502b09812d9964d
tree3b9695631ebec4ae15a97d8d8f1eabac8979a03f
parentcdf39ad374ed1605cf77b7a73e1f2a6b3f549ba7
ARM: tegra: whistler: sdmmc2 controller clock to 25MHz

As seeing issue with e1219 for high clock frequency
capping it to 25 MHz, we need to resolve this issue

BUG 780995

Original-Change-Id: I8094421b9b6d176af085d55541ef506dcefc8403
Reviewed-on: http://git-master/r/15104
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: R93b21c35cbb5ec573b13781045e295f4a8be70ac
arch/arm/mach-tegra/board-whistler.c