video: tegra: dc: fix pixel clock latency issue
authorKen Chang <kenc@nvidia.com>
Mon, 13 Feb 2012 03:22:21 +0000 (11:22 +0800)
committerSimone Willett <swillett@nvidia.com>
Fri, 24 Feb 2012 01:38:15 +0000 (17:38 -0800)
commit85f79b22473241c463a6b6563239d5916f627410
treecc755f7c4c1f688e765acc218e9860b6a1bc3753
parent89042df80700b4cb44a2da4c213d92cd080f559c
video: tegra: dc: fix pixel clock latency issue

GENERAL_ACT_REQ causes double-buffered registers to become active.
This register needs to be programed to reduce the latency of pixel clock after
dc enabled by tegra_dc_enable().

bug 926189

Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/83346
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
(cherry picked from commit f39c5ddd1867c508900c9aa2d4eead7eb3082343)

Change-Id: I741c9be9074709c1ab571aa631cb462599d5fb78
Reviewed-on: http://git-master/r/84561
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
drivers/video/tegra/dc/dc.c