spi: tegra: fix fifo_depth to 32.
authorLaxman Dewangan <ldewangan@nvidia.com>
Thu, 24 May 2012 12:52:29 +0000 (17:52 +0530)
committerSimone Willett <swillett@nvidia.com>
Fri, 25 May 2012 21:49:09 +0000 (14:49 -0700)
commit84a74690b616591b2f178bd9b08953433c66b620
treea7030d9f5e5df4174a811d4bede14058044a38bf
parent73f65f7f6898bd88fe457f96d4dc702f746058bc
spi: tegra: fix fifo_depth to 32.

Slink controller have the fifo depth of 32 words in
rx and tx side. But some of places it was taken the
value as 4. Fixing this to 32 words.

Change-Id: I262127c59241ce75d4385464c21ee733a48b1475
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/104463
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
drivers/spi/spi-tegra.c