drm/i915: implement ColorBlt w/a
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 31 Mar 2012 09:21:57 +0000 (11:21 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 11 Apr 2012 10:16:53 +0000 (12:16 +0200)
commit80e829fade4eea5f07c410df6a551c42e2d0ca9c
treec347937e2a2d83b0e9154b33866a0bfdc99251b3
parent27c1cbd06a7620b354cbb363834f3bb8df4f410d
drm/i915: implement ColorBlt w/a

According to an internal workaround master list, we need to set bit 5
of register 9400 to avoid issues with color blits.

Testing shows that this seems to fix the blitter hangs when fbc is
enabled on snb, thanks to Chris Wilson for figuring this out.

Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Michael "brot" Groh <michael.groh@minad.de>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c