arm: tegra: cardhu: LVDS pinmux settings
authorJon Mayo <jmayo@nvidia.com>
Wed, 26 Jan 2011 22:13:05 +0000 (14:13 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 02:56:45 +0000 (19:56 -0700)
commit7d8327939c29736086b5278b4d202d121747be5f
treeb41da6017fa7782c552be1d6816717a8858a6622
parentbb8bac712e6a84f2d84539b3888471cb8bfed82f
arm: tegra: cardhu: LVDS pinmux settings

LVDS1_SHTDN# using TEGRA_GPIO_PL2 / VI_D4
EN_VDD_BL1 using GMI_CS2_N / TEGRA_GPIO_PK3
EN_VDD_PNL1 using VI_D6 / TEGRA_GPIO_PL4
LCD1_BL_EN using GMI_AD10 / TEGRA_GPIO_PH2
LCD1_BL_PWM using GMI_AD8 / PWM0 (PH0)

Original-Change-Id: If0afe125d250883f76627c2e635dcb791184a85e
Reviewed-on: http://git-master/r/17114
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>
Original-Change-Id: Ic0d574354c6b064c4b5e0561a2285eb00a0f9fd6

Rebase-Id: R9faba62605d9b15e6395aed9815dbbedb3543c72
arch/arm/mach-tegra/board-cardhu-panel.c
arch/arm/mach-tegra/board-cardhu-pinmux.c