ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU
authorVarun Wadekar <vwadekar@nvidia.com>
Tue, 27 Mar 2012 10:47:20 +0000 (15:47 +0530)
committerSimone Willett <swillett@nvidia.com>
Fri, 6 Apr 2012 01:13:10 +0000 (18:13 -0700)
commit743c03fbeb5908faf4aef6bee7702a2ad4caac22
tree17bebff5bed35b544f559db0239297ff8fc9ec21
parentf31ca2d9e0580b58dc51fde31fc8ace190dd253b
ARM: tegra30: pm: flush L1 data before exit coherency on secondary CPU

Change-Id: Ib16ee5efdf8686d750a5263baa8fff4d258e68cd
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/92542
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
arch/arm/mach-tegra/sleep-t3.S