ARM: tegra11: clock: Switch from DFLL to PLL at low rate
authorAlex Frid <afrid@nvidia.com>
Thu, 11 Oct 2012 01:21:10 +0000 (18:21 -0700)
committerSimone Willett <swillett@nvidia.com>
Mon, 22 Oct 2012 21:00:18 +0000 (14:00 -0700)
commit72181d511d15193a95e860ac55a0a1d7d12d06ba
treed98b7ef787e40118457219ff5a085b74cf9dad1b
parent469f27af163a5f564e721dfdfe74bfe44307ee43
ARM: tegra11: clock: Switch from DFLL to PLL at low rate

Added an option to automatically switch CPU clock source from DFLL
to PLL when target CPU rate is below DFLL minimum rate (instead of
using skipper). This option is disabled by default, and it is
controlled by /sys/module/tegra11_clocks/parameters/use_pll_cpu_low
parameter.

Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/145169
(cherry picked from commit 0996421f20bedc55d605c89451f4680b616ba093)

Change-Id: Ieef31928d3f76c82fc4ced018c87acebbf84a5ac
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/146289
Reviewed-by: Automatic_Commit_Validation_User
arch/arm/mach-tegra/tegra11_clocks.c