ARM: tegra: dvfs: Fix predict millivolts interface
authorAlex Frid <afrid@nvidia.com>
Wed, 18 Sep 2013 05:09:36 +0000 (22:09 -0700)
committerMrutyunjay Sawant <msawant@nvidia.com>
Thu, 19 Sep 2013 13:28:26 +0000 (06:28 -0700)
commit712e59d7f1f432719c5de51b03062954e63b6f1f
tree5a4bde27012cad1520ca68390702662c23456ee4
parentf7adf59e7841f6ccefd16f5a043c8b0cbbae27fe
ARM: tegra: dvfs: Fix predict millivolts interface

Predict millivolts interface selected pll or dfll mode tables based
on target rate and dynamic dvfs state: rail mode, and current dvfs
clock rate. Since interface clients may not be serialized with run
time rate/voltage scaling (e.g., edp client) it opens possibility for
races. On the other hand there is no need to use current dynamically
changes state to select scaling table - comparing target rate, with
initialized once dfll rate range is sufficient. This commit updated
predict millivolts interface accordingly.

Bug 1370030

Change-Id: I89167607d346ed5f2dfe1eedc27aabacd87e7303
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/276139
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
arch/arm/mach-tegra/dvfs.c