ARM: tegra: clock: Change Tegra3 PLLP output frequency
authorAlex Frid <afrid@nvidia.com>
Sat, 28 May 2011 07:21:30 +0000 (00:21 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 24 Mar 2012 04:04:33 +0000 (21:04 -0700)
commit69196d70d783fd28f12ece65bd11a265cf1c0883
treeaa30400c59c7bfe3dce7ef558f325b6638eefcd2
parent7240ab7f6b128792053dbbbf167d5d228a957d8d
ARM: tegra: clock: Change Tegra3 PLLP output frequency

On Tegra3 fixed PLLP output frequency has been set to 408MHz
(instead of 216MHz). Respectively changed:

- Tegra3 broads setting for UART, and audio clocks
- Tegra3 common clock setting for PLLP output dividers, SDMMC,
  and system buses
- Tegra3 CPU backup configuration to guarantee safe backup at
  any voltage

Bug 829081

Change-Id: Ied0c75204ccb2e4a428f0b8a124f0f3e053aa386
Reviewed-on: http://git-master/r/34813
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>

Rebase-Id: R151bc882c3c0c94f8600dcb57d58ca48b32a7cea
arch/arm/mach-tegra/board-enterprise.c