ARM: tegra11x: cpuidle: Stats for C1NC/C0NC/CRAIL
authorBo Yan <byan@nvidia.com>
Thu, 25 Oct 2012 23:11:04 +0000 (16:11 -0700)
committerMrutyunjay Sawant <msawant@nvidia.com>
Tue, 30 Oct 2012 12:51:36 +0000 (05:51 -0700)
commit5fd6a29b0c64c579b9605e5c80dacf5418b8ceaf
tree9e500b2781bcd6f5a7d2477e3ca2dd4d5c0f2dff
parent4a14316fe6db70e0cc3789de2ffd5d395e0494a7
ARM: tegra11x: cpuidle: Stats for C1NC/C0NC/CRAIL

This patch adds stats for power gating C0NC and C1NC partitions,
it also adds stats for fast cluster rail gating.

The numbers under column CPU0 are the sum of CE0 power gating,
C0NC power gating, and rail gating. The numbers under column cpulp
are the sum of CELP power gating and C1NC power gating.

Change-Id: Ia02f78ed124652b1deac3a6e29a47aaec8fcd910
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/147745
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
arch/arm/mach-tegra/cpuidle-t11x.c