arm: tegra: enterprise: use proper backlight clk_div for A03/A04
authorTom Cherry <tcherry@nvidia.com>
Tue, 20 Mar 2012 23:59:51 +0000 (16:59 -0700)
committerVarun Wadekar <vwadekar@nvidia.com>
Wed, 11 Apr 2012 14:10:34 +0000 (19:10 +0530)
commit52b2125fa7c1cca0ad4abd8358aa3ecb2b1e519c
tree0bda9afae03679c8ff1a3599e8579ed71095ba21
parentfadb7a9a94ab866fcb1e7ded77b443a48216efb9
arm: tegra: enterprise: use proper backlight clk_div for A03/A04

The new TPS61160A part asks for the control PWM signal to be between
5kHZ and 100kHz.  This change sets clk_div to 0x1D for a 5kHz signal.

This change also installs a linear table for
enterprise_bl_output_measured_a03.

Bug 956246

Reviewed-on: http://git-master/r/91606
(cherry picked from commit 32a67cf7b1c8223abe8de7d88b4bcd1906cda0a2)

Change-Id: Ic7907cfae6f918ef055add33615822ef8c5e0ec6
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/93051
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
arch/arm/mach-tegra/board-enterprise-panel.c